SJTU 2006 SPADE Introduction Ma Diming

Slides:



Advertisements
Similar presentations
An Optimized Cost/Performance PDS Design Using OptimizePI
Advertisements

Short introduction to the use of PEARL General properties First tier assessments Higher tier assessments Before looking at first and higher tier assessments,
Introduction to Visual Basic.NET Uploaded By: M.Sheraz anjum.
Chapter 7 Operational-Amplifier and its Applications
Getting Started with Cadence Compiled by Ryan Johnson April 24, 2002  Open Orcad Capture under Engineering Software  Under FILE, choose NEW, PROJECT.
LNA Simulation Tutorial
Pacemaker Electrode Bidirectional Interface to Autodesk Inventor.
With TimeCard appointments are tagged with information that converts them into time sheets. This way users can report time and expenses from their Outlook.
MP IP Strategy Stateye-GUI Provided by Edotronik Munich, May 05, 2006.
PSPICE Tutorial. Introduction SPICE (Simulation Program for Integrated Circuits Emphasis) is a general purpose analog circuit simulator that is used to.
Introduction to PSpice Simulation Software. The Origins of SPICE In the 1960’s, simulation software begins –CANCER Computer Analysis of Nonlinear Circuits,
SP2006 CSE598A/EE597G CAD Tool Tutorial Spring 2006 CSE598A / EE597G Analog-Digital Mixed-Signal CMOS Chip Design.
Using Spice in Lab Practicing for Analog ASIC Design Goran Jovanović, Faculty of Electronic Engineering University of Niš Serbia and Montenegro.
Integrated Circuits Laboratory Faculty of Engineering Digital Design Flow Using Mentor Graphics Tools Presented by: Sameh Assem Ibrahim 16-October-2003.
HORIZONT 1 ProcMan ® The Handover Process Manager Product Presentation HORIZONT Software for Datacenters Garmischer Str. 8 D München Tel ++49(0)89.
EE 2303 Week 2 EE 2303 Week 2. Overview Kirchoff’s Current Law (KCL) Kirchoff’s Voltage Law (KVL) Introduction to P-spice.
1 Project supervised by: Dr Michael Gandelsman Project performed by: Roman Paleria, Avi Yona 26/4/2004 Multi-channel Data Acquisition System Final_A Presentation.
Simulation of Created Design Documentation on the simulation process of a basic injector-separation channel model design.
Microwave Amplifier Design Blog by Ben (Uram) Han and Nemuel Magno Group 14 ENEL 434 – Electronics 2 Assignment
Introduction to Digital Works. The Digital Works Window.
Final presentation – part B Olga Liberman and Yoav Shvartz Advisor: Moshe Porian April 2013 S YMBOL G ENERATOR 2 semester project.
Matlab -based Scope Automation and data analysis SW 29/05/2012 Presents by- Abed Mahmoud & Hasan Natoor Supervisor– Avi Biran.
Ansys Workbench 1 Introduction
Introduction to Controlling the Output Power of a Transistor Stage A load network will be designed to maximize the output power obtainable from the Mitsubishi.
Lattice Technology New Product Feature Highlights July 2010 Product Release.
The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE122 – 30 Lab 5: Layout.
Marcel Casado NCAR/RAP WEATHER WARNING TOOL NCAR.
Simulink ® Interface Course 13 Active-HDL Interfaces.
Introduction With TimeCard users can tag SharePoint events with information that converts them into time sheets. This way they can report.
TCL/Tk Based Environment for Mixed-Signal Circuit Design System Description Software Architecture Examples Future Directions Summary.
A New Method For Developing IBIS-AMI Models
Mariza Wijayanti Introduction Design of kmap minimizer Result and Discussion.
Command Interpreter Window (CIW)
Interfaces to External EDA Tools Debussy Denali SWIFT™ Course 12.
The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE122 – 30 Lab 3: Layout.
Introduction to Enterprise Guide Jennifer Schmidt Rhonda Ellis Cassandra Hall.
© 2003 Xilinx, Inc. All Rights Reserved Global Timing Constraints FPGA Design Flow Workshop.
Programmable Logic Training Course HDL Editor
Introduction to ArcGIS for Environmental Scientists Module 3 – GIS Analysis Model Builder.
Mining Binary Constraints in Feature Models: A Classification-based Approach Yi Li.
Cadence tools Brandon Rumberg.
MWO – APPLICATION IN FILTER DESIGN Soh Ping Jack Sabarina Ismail.
Objectives Understand the design environment and flow
SJTU 2006 SPADE Manual Ma Diming
© 2005, it - instituto de telecomunicações. Todos os direitos reservados. Tools and Methods to Assist Analog IC Designers Nuno Horta, PhD Head of Integrated.
Supervised By: Dr. Juergen Dingel Suchita Ganesan, Laith “Leo” Juwaidah, Nondini Das Madiha Kazmi, Mojtaba Bagherzadeh Model-Based Monitoring for PapyrusRT.
L 05 29Jan021 EE Semiconductor Electronics Design Project Spring Lecture 05 Professor Ronald L. Carter
Introduction to SQL Server 2005 Reporting Services Melville Thomson IT Pro Evangelist
© Geodise Project, University of Southampton, Workflow Application Fenglian Xu 07/05/03.
Psychophysics Software Suite Yearly project for Dr. Karen Banai.
IBM Express Runtime Quick Start Workshop © 2007 IBM Corporation Deploying a Solution.
ECE122 – Digital Electronics & Design Tanner Tools Tutorial Ritu Bajpai September 4, 2008.
QC – User Interface QUALITY CENTER. QC – Testing Process QC testing process includes four phases: Specifying Requirements Specifying Requirements Planning.
Active-HDL Server Farm Course 11. All materials updated on: September 30, 2004 Outline 1.Introduction 2.Advantages 3.Requirements 4.Installation 5.Architecture.
Written by Whitney J. Wadlow
Lab 1 LTspice Intro EC538 Selected Topics in Electronics 1 Eng. Nihal Tawfik.
Altera Technical Solutions Seminar Schedule OpeningIntroduction FLEX ® 10KE Devices APEX ™ 20K & Quartus ™ Overview Design Integration EDA Integration.
1 EE 382M VLSI 1 EE 360R Computer-Aided Integrated Circuit Design Lab 1 Demo Fall 2011 Whitney J. Wadlow.
Created by Tim Green, Art Kay Presented by Peggy Liska
Introduction to LTspice IV
Diode Detector Simulation, Design and Measurement
EE434 Jason Adams Mike Dierickx
Written by Whitney J. Wadlow
Improving Scilab’s Xcos User Interface
Introduction With TimeCard users can tag SharePoint events with information that converts them into time sheets. This way they can report.
First contact with Cadence icfb
M. Kezunovic (P.I.) S. S. Luo D. Ristanovic Texas A&M University
FEMAS Development - Progress
FEMAS Development - Progress
Presentation transcript:

SJTU 2006 SPADE Introduction Ma Diming

SJTU 2006 Outline Motivation & Objectives Analog Design Flow SPADE Introduction Assignments Project Schedule Q & A

SJTU 2006 Motivation & Objectives Analog Designers Demand –Design Automation –Different Tools Integration –Symbolic Instead of Numerical GRASS Tool Right Here –Symbolic, Optimal Solutions –Sources –Demand Oriented Analog Circuits Class Lab –Practical Use

SJTU 2006 Analog Design Flow Circuit Descriptions Simulation Results & Analysis Meet Requirements? Re- Design No Yes, Design Done Schematic Descriptions Netlist Descriptions Numerical, HSpice, Spectrum Symbolic, GRASS Waveforms, Curves, Avanwaves Direct Optimal Results, W/L A, PM, Z-P, SNR, BW, SR, … Ideal : Requirements + Design Solution => Results

SJTU 2006 Analog Design Flow GRASS is ClOSER to the Dream –Symbolic => accurate –Consider parameters variation –Condense solutions to smaller ranges –Alex authentications Thus GRASS accompanied with analog designers produces SPADE

SJTU 2006 SPADE Introduction Design Features –Schematic Editor (Virtuoso, or SED) –Simulator (HSPICE) –2D/3D GUI for results representation –Hierarchical design support –Parameters variation consideration –Basic analog design target consideration (PM, ro, A, etc.) –Numerical simulation avoidance –Matlab like function representation –Specified model simulation –… … SPADE is short for Simulation Program for Analog Design Education thanks to his father, Pro. Shi.

SJTU 2006 SPADE Introduction GRASS Role NetlistDC SimModel Extraction Graph ReductionH(S)2D/3D Representations SPADE Flow Circuits

SJTU 2006 SPADE Introduction A HSpice Like Interface FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE Points  Flow is like: Formula / ICFB->Netlist->Configure->Simulate  2D/3D, Parallel, etc. options decided by user to show the results

SJTU 2006 SPADE Introduction FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE + Current + Conductance + … Default Formula User Defined + User Group … New Add List Category 2D/3DX Tab1Tab2 Properties (range, points …) X-Y Position 3D / 2D View

SJTU 2006 SPADE Introduction FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE Launching Cadence ICFB / Virtuoso Or Schematic Editor

SJTU 2006 SPADE Introduction FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE Multi-tab Editor or GEditor, Vim, Emacs, etc. (For Editing, Saving, etc.)

SJTU 2006 SPADE Introduction FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE Lib, model, path setting 2D/3D setting Frequency range setting Focused device range setting PDF Setting Other Settings Point is embed all the properties of result curve as phase margin db, frequence db, etc. inside the tool

SJTU 2006 SPADE Introduction FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE HSpice DC run TKY’s script for parameters extraction GRASS run Results representation in 2D/3D view

SJTU 2006 SPADE Introduction FormulaNetlist Schematic Editor Cadence ICFB SimulateConfigureHelp & About Menu SPADE Html / PDF Auto Generation Better if man is added

SJTU 2006 Assignments Schematic Editor Model Related Hierarchical Design Supported Parameter Extraction Gtk/Qt/OpenGL Integration Formula Design Targeted Oriented (Ro, P-Z, etc.) ……

SJTU 2006 Assignments Li Xiaopeng: Scripts Related –Hierarchical design –Parameter extraction –Parser Xu Hui: Design Target Oriented –Output impedance –… Zhang He: Qt & OpenGL Related –3D GUI integration & transplant Weng Binbin: Gtk Related –Formala Huang Weijian: Supervise –Supervise, advise, evaluate, feedback Ma Diming: Tool Related –All things left

SJTU 2006 Project Schedule Milestone 1: 15 th March (Res: Ma Diming) –Parser (Res: Li Xiaopeng) Milestone 2: 16 th April (Res: Ma Diming) –Output Impedence (Res: Xu Hui) –Hierarchical Support (Res: Li Xiaopeng) –3D Integration (Res: Zhang He) –Formula (Res: Weng Binbin) Milestone 3: End of the semester (Res: Ma Diming) –Model Related (Assignments Not Ready Yet)

SJTU 2006 Q & A Thank You