CALIBRATION OF TEVATRON IONIZATION PROFILE MONITOR (IPM) FRONT END (FE) MODULES Moronkeji Bandele Physics and Engineering Department Benedict College, Columbia, South Carolina Summer Internships in Science and Technology Supervisor: Kwame Bowie

August 7, 2007Bandele2 Outline  Motivation  Tevatron IPM DAQ System  Tevatron IPM Front End (FE) Board  Research Objectives  Experimental Analysis  Material Preparation  Initial Function Test  Charge Injection Calibration Test  Long – Term Stability Test  Data Analysis / Calculations  Gain Plots  Conclusions  Future Works  Acknowledgements

August 7, 2007Bandele3Motivation  A Data Acquisition (DAQ) instrument for Tevatron  Tevatron Ionization Profile Monitor (IPM) System - to monitor the proton and antiproton beam bunch size and position at a fixed location in the Tevatron  IPM Front End (FE) Components:  In – Tunnel Subsystem  Upstairs Subsystem – implements all the intelligence and control for the Tevatron IPM DAQ system. The Tevatron and Main Injector rings

August 7, 2007Bandele4Motivation  In – tunnel Subsystem (Single Euro Card Crate)  Backplane – serves as medium for power supply  Fan – out card – duplicates signals it receives from timing card  Front – end (FE) boards – houses the very important QIE8 chip, developed by engineers at Fermi Lab.  Upstairs Subsystem (Single PC)  Timing Card – timing card sends signals to the Euro card crate (fan – out card) on a single CAT5 cable.  Buffer Boards – stores data received Buffer Card Fan – out Card

August 7, 2007Bandele5 Tevatron IPM System flow chart Host PC (Labview) Timing card (PCI) Data Buffer (2*8 ch) PCI Timing fan-out QIE cards (16x 8 ch) Upstairs Subsystem In – tunnel Subsystem

August 7, 2007Bandele6 Tevatron IPM DAQ System Computer screen Oscilloscope Schematic Diagram of Experimental Setup Pulse – carrying Cable Channel selectors Trigger Fan-out card Backplane Euro card Crate CAT5 Cable PC Analog Pulse Timing/Clock signal Power supply Pulse Generator FE Boards Bias Resistor Optical Fiber Oscilloscope

August 7, 2007Bandele7 Materials Preparation  Solder bias resistor onto cable  Connect cable to channel selector  Insert board (s) into Euro card crate  Insert optical fiber into the optical data link  Connect CAT5 cable into PC and Euro card crate  Connect charge – carrying table to FE board  Power on the pulse generator, power supply, oscilloscope

August 7, 2007Bandele8 Material Preparation Channel Selectors Oscilloscope Resistors Power Supply system FE Boards in Euro card crate Bias resistor soldered to cable soldered to cable

August 7, 2007Bandele9 Tevatron IPM System Actual Experimental Setup

August 7, 2007Bandele10 Tevatron IPM FE Board  Front End portion of the IPM DAQ system  Contains the very important radiation tolerant Application Specific Integrated Circuit (ASIC), QIE8, developed by engineers at Fermi Lab. QIE8 uses parallel circuitry to achieve a dead timeless continuous integration.  FE board functions  QIE8 Chip integrates and digitizes charge received at its input channels  Generate timing and error information for each beam bunch  Transmit data to Buffer Boards via optical link

August 7, 2007Bandele11 Front End (FE) Card BACKPLANE QIEs, Biasing, and Interface Power Supply Clock Distribution Circuitry QIE clock = 15 MHz Serializer clock = 40MHz 9 Bits Laser Optical Module 1.6Gb/s Optical Link 9 Bits Logic and Control FPGA Module 8 Point to point PECL Clock Pairs Header Word Serializer PECL QIE clock

August 7, 2007Bandele12 IPM FE CARD Overview 1.Optical Link 2.Clock Distribution 3.Crystal Oscillator 4.CERN GOL 5.FPGA 6.Analog Connectors 7.QIE8 Chips 8.Glue Logic 9.Power Regulator 10. Backplane Connectors 6a b 7a 7f 7f 7e 7d 7c 7b 7g 8c 8d 8a 6b 9a 9b 10a 10b

August 7, 2007Bandele13 Research Objectives  To test/calibrate the boards  To collect charge data  To analyze data  Testing Process  Initial Functional Test  Charge Injection Calibration Test : Research Focus  Long Term Stability Test

August 7, 2007Bandele14 Initial Function Test  Insert FE boards into Euro card crate  Supply power through backplane  Run boards for five consecutive events using Labview program; process data  Monitor closely for errors at channels  Log events in a data text file  Proceed to Charge Injection Calibration Test phase.

August 7, 2007Bandele15 Initial Function Test Sample data logged into text file

August 7, 2007Bandele16 Charge Injection Calibration Test  Set and record pulse width and amplitude  Calculate expected output charge (area under pulse)  Inject charge to FE board/QIE generated by pulse generator  Run five consecutive events  Read and analyze data using Labview Software  Record Pulse Peak  Convert peak value from QIE code to charge value  Plot experimental results against expected charge value ME!

August 7, 2007Bandele17 Charge Injection Calibration Test

August 7, 2007Bandele18 Long Term Stability Test  Many boards are placed into Euro card crate  A looping acquisition is started. The acquisition counts the number of errors of each type on each board.  Test is run long enough to acquire enough statistics to be confident of the actual error rate.  This test is repeated with different groups of boards.

August 7, 2007Bandele19 Long Term Stability Test Screenshot from the Tevatron IPM Labview program

August 7, 2007Bandele20 Data Analysis - Calculation Voltage (V) = Current (I) * Resistance(R), Ohm ’ s Law I = V R 7.32V= I 1.3MΩ;1.3MΩ = 1.3 * 10 6 Ω I = 7.32V 1.3 * 10 6 Ω =5.63 * A Area of Rectangle (Length * breath) = (4.56 * s) * (5.63 * A) = * C = fC Area of Triangle {(1/2) * base * height} = {((5.22/2) * s) * (5.63 * A)} = fC * 2 = fC Area under the curve (Expected charge value) = Area of Rectangle + Area of Triangle = fC fC = fC 7.32V / 7.32 * A 15.0ns 4.56ns 5.22ns b a c

August 7, 2007Bandele21 Calibration Test - Data QIE codeCharge Value (fC) Conversion Table Screenshot from the Tevatron IPM Labview program IPM Labview program

August 7, 2007Bandele22 Calibration Test - Data Channel 0Channel 1Channel 2Channel 3Channel 4Channel 5Channel 6Channel Channel 0 (fC) Channel 1 (fC) Channel 2 (fC) Channel 3 (fC) Channel 4 (fC) Channel 5 (fC) Channel 6 (fC) Channel 7 (fC) Average Raw Data from Lab view Program Converted Data from Lab view Program

August 7, 2007Bandele23 channel 0 (fC) channel 1 (fC) channel 2 (fC) channel 3 (fC) channel 4 (fC) channel 5 (fC) channel 6 (fC) channel 7 (fC) Expected Charge (fC) 15ns ns ns channel 0 (fC) channel 1 (fC) channel 2 (fC) channel 3 (fC) channel 4 (fC) channel 5 (fC) channel 6 (fC) channel 7 (fC) Expected Charge (fC) 15ns ns ns channel 0 (fC) channel 1 (fC) channel 2 (fC) channel 3 (fC) channel 4 (fC) channel 5 (fC) channel 6 (fC) channel 7 (fC) Expected Charge (fC) 15ns ns ns Calibration Test - Data 100kΩ 1MΩ 10MΩ

August 7, 2007Bandele24 Gain Plots – Board #21

August 7, 2007Bandele25 Gain Plots – Board #23

August 7, 2007Bandele26Conclusions  Difference in readings due to the variation in the experimental setup from advised specifications for QIE8  Chip was originally designed to function at the Large Hadron Collider (LHC) at CERN  The clock integration period at which the QIE8 operates in Tevatron is 66ns (15.17MHz);should be 25ns (40MHz)  Longer clock integration time is necessary here at the Tevatron at Fermi Lab because of the difference in particle spacing  Bias resistance value of 750kΩ being used in the QIE circuitry, instead of the specified 220kΩ

August 7, 2007Bandele27Conclusion  Some channels on some test boards are dead  The majority of the channels have a similar linear transfer function, as expected  Most of the Front End Boards are good and can be used in Tevatron IPM Data Acquisition (DAQ) System

August 7, 2007Bandele28 Future Works  There will be modifications made to several components of the channels  Boards will be re – tested until the desired result is attained

August 7, 2007Bandele29Acknowledgements  Almighty God  Dianne Engram  Dave Ritchie and Elliot McCrory, Mentors  Kwame Bowie – My Supervisor  Dr Davenport, Mentor  Particle Physics Division / Electrical Engineering Department Staff, 14 th Floor  SIST Interns

August 7, 2007Bandele30