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Beam phase and intensity measurement Grzegorz Kasprowicz Richard Jacobsson.

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Presentation on theme: "Beam phase and intensity measurement Grzegorz Kasprowicz Richard Jacobsson."— Presentation transcript:

1 Beam phase and intensity measurement Grzegorz Kasprowicz Richard Jacobsson

2 BPMs Beam Screen Button Feedthrough Liquid Helium Cooling Capillary

3 Pick-ups at IPs (BPTXs) ~150m to the IP Located ~150m from the IP in front of the D2 Magnet One BPTX either side of the IP on the incoming beam Exclusively used by the experiments –Monitoring phase of the beam with respect to LHC clock –Monitoring bunch intensity

4 BPTXs Use Button Electrode BPM type Peak voltage (one button) of ~5V after 200m of cable for nominal bunch –Sum voltage from all buttons  Independent of beam position Acquisition and processing? Amplitude (V) Time (ns)

5 BPIM specifications: M - Measuring beam intensity C - Collecting intensity results per bunch and averaging them - - Outputting intensity measurement at 40 MHz via LVDS interface - - Resolution of intensity measurement - 8 bits - - Measuring phase between incoming bunch signal and bunch clock - - Collecting delay results for every bunch and averaging them - - Digital approximation of converter characteristics - - Resolution of phase measurement better than 50ps - - Data processing in FPGA - Ethernet based control interface - - All the adjustments via the Ethernet - 6U VME board

6 Beam intensity measurement L` LPF ADC FPGA Linearization Block Coefficients RAM Histogram Calculation Block RAM Delay Line 1 Delay Line 2 Credit Card PC Glue Card Local Bus Ethernet Result 40MB/s Pulse detect Threshold

7 Beam phase measurement LPF ADC FPGA Linearization Block Coefficients RAM Histogram Calculation Block RAM Delay Line 3 Delay Line 4 Credit Card PC Glue Card Local Bus Flip Flop BCLK Ethernet 12 bit Pulse detect Threshold

8 Simulation results – beam intensity measurement rectified input signal integrator’s output ADC sampling moment input signal

9 Simulation results – beam phase measurement input signal integrator’s output D flip-flop output BCLK ADC sampling moment rectified input signal

10 Approximation A first order polynomial approximation is used All ADC range (0 to 4095) is divided into 32 sub ranges In each of them, measured value is described by equation: Ym = a*Xreal + b where Xreal – real measured value, Ym – measured value with error, a – scaling coefficient, b – shift value In order to obtain a real value, circuit must realize following equation : Xreal = (Ym – b) / a Implementation of this needs only one multiplier and adder

11 BPIM PCB design


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