EE141 © Digital Integrated Circuits 2nd Devices 1 Lecture 5. CMOS Device (cont.) ECE 407/507.

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Presentation transcript:

EE141 © Digital Integrated Circuits 2nd Devices 1 Lecture 5. CMOS Device (cont.) ECE 407/507

EE141 © Digital Integrated Circuits 2nd Devices 2 What is a Transistor? A Switch! |V GS | An MOS Transistor

EE141 © Digital Integrated Circuits 2nd Devices 3 NMOS and PMOS NMOS and PMOS

EE141 © Digital Integrated Circuits 2nd Devices 4 The MOS Transistor Polysilicon Aluminum

EE141 © Digital Integrated Circuits 2nd Devices 5 MOS Transistors - Types and Symbols D S G D S G G S DD S G NMOS Enhancement NMOS PMOS Depletion Enhancement B NMOS with Bulk Contact

EE141 © Digital Integrated Circuits 2nd Devices 6 Threshold Voltage: Concept

EE141 © Digital Integrated Circuits 2nd Devices 7 The Threshold Voltage

EE141 © Digital Integrated Circuits 2nd Devices 8 The Body Effect

EE141 © Digital Integrated Circuits 2nd Devices 9

EE141 © Digital Integrated Circuits 2nd Devices 10

EE141 © Digital Integrated Circuits 2nd Devices 11 Transistor in Linear

EE141 © Digital Integrated Circuits 2nd Devices 12 Transistor in Saturation Pinch-off

EE141 © Digital Integrated Circuits 2nd Devices 13

EE141 © Digital Integrated Circuits 2nd Devices 14

EE141 © Digital Integrated Circuits 2nd Devices 15

EE141 © Digital Integrated Circuits 2nd Devices 16 A model for manual analysis

EE141 © Digital Integrated Circuits 2nd Devices 17 Current-Voltage Relations The Deep-Submicron Era Linear Relationship -4 V DS (V) x 10 I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Early Saturation

EE141 © Digital Integrated Circuits 2nd Devices 18 Velocity Saturation  (V/µm)  c = 1.5  n ( m / s )  sat = 10 5 Constant mobility (slope = µ) Constant velocity

EE141 © Digital Integrated Circuits 2nd Devices 19 Perspective I D Long-channel device Short-channel device V DS V DSAT V GS - V T V GS = V DD

EE141 © Digital Integrated Circuits 2nd Devices 20 I D versus V GS x V GS (V) I D (A) x V GS (V) I D (A) quadratic linear Long Channel Short Channel

EE141 © Digital Integrated Circuits 2nd Devices 21 I D versus V DS -4 V DS (V) x 10 I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V x V DS (V) I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V ResistiveSaturation V DS = V GS - V T Long ChannelShort Channel

EE141 © Digital Integrated Circuits 2nd Devices 22 A unified model for manual analysis S D G B

EE141 © Digital Integrated Circuits 2nd Devices 23 Simple Model versus SPICE V DS (V) I D (A) Velocity Saturated Linear Saturated V DSAT =V GT V DS =V DSAT V DS =V GT

EE141 © Digital Integrated Circuits 2nd Devices 24 A PMOS Transistor x V DS (V) I D (A) Assume all variables negative! VGS = -1.0V VGS = -1.5V VGS = -2.0V VGS = -2.5V

EE141 © Digital Integrated Circuits 2nd Devices 25 Transistor Model for Manual Analysis

EE141 © Digital Integrated Circuits 2nd Devices 26 The Transistor as a Switch

EE141 © Digital Integrated Circuits 2nd Devices 27 The Transistor as a Switch

EE141 © Digital Integrated Circuits 2nd Devices 28 The Transistor as a Switch

EE141 © Digital Integrated Circuits 2nd Devices 29 The Sub-Micron MOS Transistor  Threshold Variations  Subthreshold Conduction  Parasitic Resistances

EE141 © Digital Integrated Circuits 2nd Devices 30 Threshold Variations V T L Long-channel threshold LowV DS threshold Threshold as a function of the length (for lowV DS ) Drain-induced barrier lowering (for lowL) V DS V T

EE141 © Digital Integrated Circuits 2nd Devices 31 Sub-Threshold Conduction V GS (V) I D (A) VTVT Linear Exponential Quadratic Typical values for S: mV/decade The Slope Factor S is  V GS for I D 2 / I D 1 =10

EE141 © Digital Integrated Circuits 2nd Devices 32 Sub-Threshold I D vs V GS V DS from 0 to 0.5V

EE141 © Digital Integrated Circuits 2nd Devices 33 Sub-Threshold I D vs V DS V GS from 0 to 0.3V

EE141 © Digital Integrated Circuits 2nd Devices 34 Summary of MOSFET Operating Regions  Strong Inversion V GS > V T  Linear (Resistive) V DS < V DSAT  Saturated (Constant Current) V DS  V DSAT  Weak Inversion (Sub-Threshold) V GS  V T  Exponential in V GS with linear V DS dependence

EE141 © Digital Integrated Circuits 2nd Devices 35 Parasitic Resistances

EE141 © Digital Integrated Circuits 2nd Devices 36 Latch-up

EE141 © Digital Integrated Circuits 2nd Devices 37 Future Perspectives 25 nm FINFET MOS transistor