Computer Organization and Architecture Instructions: Language of the Machine Hennessy Patterson 2/E chapter 3. Notes are available with photocopier 24 th March, 2008

Hw 1 Due in next class. Available on Punjab in Farhan Iqbal folder.

Quiz Suppose we have made the following measurements: Frequency of FP operations = 25 % Average CPI of FP operations = 4.0 Average CPI of other Instructions = 1.33 Frequency of FPSQR = 2% CPI of FPSQR = 20 Assume that the two design are to decrease the CPI for FPSQR to 2 or to decrease the average CPI of all FP operations to 2.5. Compare these two design alternatives using the processor performance equation. Hint: Do not use Ahmdel’s law BLINDLY.

Operations Fundaments Arithmetic operations always needed. In MIPS add, subtract add a, b, c # add b and c and store in a sub a, b, c # subtract c from b and store in a Requires 3 operands i.e. fixed Operands. Why???? Arithmetic operation is performed on two operands and result is stored in third.

Example a = b + c + d + e

Example Just like C temporary variables can also be used f = (g + h) – (i + j)

add t0, g, h add t1, i, j sub f, t0, t1

Operands Variables – registers Typically 32 In MIPS 32 registers of 32 bits (word) Why limited?? MIPS convention is using $s0, $s1.. $s31 Redoing the example f = (g + h) – (i + j) ;

Data structure of programming languages can contain many more data elements than register. How will computer represent/access these large structures? Large data structures are stored in … ?

Data Transfer Instructions Arithmetic operations only occur in registers Data is stored in memory Instructions that transfer data between memory and registers are required. Operand, Address Load, store lw, sw

Example lw $t0, 100($s2) # $t0 = Mem[100+$2] offset??, base register ?? Lets assume that A is an array of 100 words and that the compiler has associated the variables g and h with the registers $s1 and $s2 as before. Lets also assume that the starting address, or base address of the arrary is in $s3. Translate this C assignment statement: g = h + A[8]

Byte addressing For MIPS a word is 32 bits or 4 bytes Register holds 32 bits of data 2 32 bytes with byte addresses from 0 to 2 32 – words with byte address from 0 to Big Endian, Little Endian Offset to be the added to the base register is re- calculated.

Example Assume variable h is associated with register $s2 and the base address of the array A is in $s3. What is the MIPS assembly code for the C assignment statement below? A[12] = h + A [8]

lw $t0, 32 ($s3) add $t0, $s2, $t0 sw $t0, 48($s3)

Example Assume A is in array of 100 elements whose base is in register $s3 and that the compiler associates the variables g, h and i with register $s1, $s2 and $s4 respectively. What is the MIPS assembly code corresponding to this C segment? g = h + A [i]

add $t1, $s4, $s4 add $t1, $t1, $t1 add $t1, $t1, $s3 lw $t0, 0 ($t1) add $s1, $s2, $t0

Representing Instructions in the Computer MIPS fields R Type Format op: Basic operation, opcode rs: first register source operand rt: the second register source operand rd: destination operand shamt: Shift Amount funct: function code oprsrtrdshamtfunt 6 bits5 bits 6 bits

Load requires two operands and a constant. Constant limited to 5 bit fields only?? I- Type Format oprsrtAddress 6 bits5 bits 16 bits