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Instructions - Type and Format

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1 Instructions - Type and Format
COMPUTER ARCHITECTURE Instructions - Type and Format (Based on text: David A. Patterson & John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3rd Ed., Morgan Kaufmann, 2007)

2 COURSE CONTENTS Introduction Instructions Computer Arithmetic
Performance Processor: Datapath Processor: Control Pipelining Techniques Memory Input/Output Devices

3 Instructions Instruction Type Instruction Format

4 Introduction Instruction: Words of machine’s language
Instruction Set: Set of instruction RISC (Reduced Instruction Set Computer) Design Principles: Principle 1: Simplicity favors regularity Principle 2: Smaller is faster Principle 3: Good design demands good compromises Principle 4: Make the common case fast We’ll be working with MIPS architecture Used by NEC, Nintendo, Cisco, Silicon Graphics, Sony, …

5 MIPS Instruction Set Arch.: Registers
Registers - 32 general purpose registers, 3 special purpose registers, each 32 bits $zero (0): constant 0 $at (1): reserved for assembler $v0-v1 (2-3): values for results & expression evaluation $a0-a3 (4-7): arguments $t0-t7 (8-15): temporaries $s0-s7 (16-23): saved $t8-t9 (24-25): more temporaries $gp (28): global pointer $sp (29): stack pointer $fp (30): frame pointer $ra (31): return address Registers $0 - $31 PC Hi Lo 3 special purpose registers PC: program counter Hi, Lo: for multiply and divide

6 MIPS Instruction Set Arch.: Memory
Register 32 bits 8 bits Word length = 32 bits Memory: byte addressable, Big Endian 1 word = 4 bytes Each address is to a byte Registers are smaller than memory, but with faster access time Note: Word – unit of access in a computer Big-endian – uses leftmost or “big end” byte as word address Little-endian – uses rightmost or “little end” byte as word address

7 Registers vs. Memory Arithmetic instructions operands must be registers, Only 32 registers provided Compiler associates variables with registers What about programs with lots of variables Processor I/O Control Datapath Memory Input Output

8 Instructions Load and store instructions Example:
C code: A[12] = h + A[8]; MIPS code: lw $t0, 32($s3) add $t0, $s2, $t0 sw $t0, 48($s3) Can refer to registers by name (e.g., $s2, $t2) instead of number Store word has destination last Remember arithmetic operands are registers, not memory! Can’t write: add 48($s3), $s2, 32($s3)

9 Our First Example Can we figure out the code? swap:
muli $2, $5, 4 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 swap(int v[], int k); { int temp; temp = v[k] v[k] = v[k+1]; v[k+1] = temp; }

10 MIPS Instruction Types
Arithmetic & logic (AL) add $s1, $s2, $s3 # $s1  $s2 + $s3 sub $s1, $s2, $s3 # $s1  $s2 - $s3 each AL inst. has exactly 3 operands, all in registers addi $s1, $s2, # s1  $s the constant is kept in the instruction itself Data transfer (load & store) lw $s1, 100($s2) # $s1  memory [$s2+100] (load word) sw $s1, 100($s2) # memory[$s2+100]  $s1 (store word) lb $s1, 100($s2) # $s1  memory [$s2+100] (load byte) sb $s1, 100($s2) # memory[$s2+100]  $s1 (store byte) load/store bytes commonly used for moving characters (ASCII)

11 MIPS Instruction Types
Conditional Branch beq $s2, $s3, L1 # branch to L1 if $s2 = $s3 bne $s2, $s3, L1 # branch to L1 if $s2  $s3 beq $s1, $s2, 25 # branch to PC (=4x25) if $s1 = $s2 slt $s2, $s3, $s4 # if ($s3) < ($s4) then $s2  1; # else $s2  0 (set on less than) Unconditional Branch j Loop # go to Loop (jump) j # go to 4x2500=10000 (jump) jr $t # go to $t1 (jump register) jal Proc # $ra  PC + 4; go to Proc1 (jump & link)

12 Compiling a High Level Language
Assignment statement (operands in registers, operands in memory) Assignment statement (operands with variable array index) If-then-else statement Loop with variable array index While loop Case / switch statement Procedure that doesn’t call another procedure Nested procedures Using strings Using constants Putting things together

13 Compiling a High Level Language
Arithmetic instructions useful for assignment statements Data transfer instructions useful for arrays or structures Conditional branches useful for if-then-else statements & loops Unconditional branches Case / switch statements, procedure calls and returns

14 Basic Blocks A basic block is a sequence of instructions
without branches except possibly at the end, and without branch targets or branch labels, except possibly at the beginning One of the first early phases of compilation is breaking the program into basic blocks

15 Procedure Call Use the following registers
$a0-a3: to pass parameters $v0-v1: to return values for results & expression evaluation $ra: return address $sp: stack pointer (points to top of stack) $fp: frame pointer Use the following instructions jal ProcedureAddress # it jumps to the procedure address and saves # the return address (PC + 4) in register $ra jr $ra # return jump; jump to the address stored in register $ra Use stack a part of memory to save the registers needed by the callee

16 Nested Procedures High address $fp $sp $fp $sp $fp Arg. registers
Use stack to preserve values ($a0-a3, $s0-s7, $sp, $ra, stack above $sp, and $fp & $gp if need to use them) No need to preserve $t0-t9, $v0-v1, stack below $sp Frame pointer serves as stable base register within procedure for local references Procedure frame (activation record): High address $fp $sp $fp $sp $fp Arg. registers Return address Saved registers Local arrays & structures Low address $sp

17 Instruction Format All instructions are 32 bits
3 types of formats: R-type (Regular) I-type (Immediate) J-type (Jump) Fields (# of bits) op (6): opcode (basic operation) rs (5): 1st register source operand rt (5): 2nd register source opd. rd (5): register destination opd. shamt (5): shift amount funct (6): function (select specific variant of operation in op field) Op rs rt rd shamt funct Op rs rt address/immediate Op target address address/immediate (16) target address (26)

18 Instruction Format (Examples) - 1
R-type Examples: add $t0, $s2, $t0 sub $s1, $s2, $s3 slt $s1, $s2, $s3 jr $ra #0s in rt, rd, and shamt fields I-type Examples: lw $s1, 100($s2) #100 appears in address/immediate field sw $s1, 100($s2) #100 appears in address/immediate field beq $s1, $s2, # 25 appears in address/immediate field (eqv. to 100) J-type Examples: j #2500 appears in target address field (eqv. to 4x2500=10000) jal #2500 appears in target address field (eqv. to 4x2500=10000)

19 Instruction Format (Examples) - 2
R-type Example: add $t0, $s2, $t0 I-type Example: lw $s1, 100($s2) J-type Example: j 2500 Op= rs= rt= rd=8 shamt=0 funct=32 Op=35 rs= rt= Op=

20 Motivation for I-type Instructions
For many operations, one operand = constant C compiler gcc: % Spice 69% Design principle: Make the common case fast

21 J-Type Instructions Example:
j 200 # go to location 800 (=200*4) Other J type instruction: jal 200 # jump & link, go to location 800 (=200*4) # $31(ra)  PC + 4

22 Assembly Language vs. Machine Language
Assembly provides convenient symbolic representation much easier than writing down numbers e.g., destination first Machine language is the underlying reality e.g., destination is no longer first Assembly can provide ‘pseudoinstructions’ e.g., “move $t0, $t1” exists only in Assembly would be implemented using “add $t0, $t1, $zero” When considering performance you should count real instructions

23 Summary Instruction Type Instruction Format RISC Design Principles
Assembly vs. Machine Language


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