1 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information SEAKR Engineering Inc. On-Board Processing SEAKR Engineering Inc. On-Board Processing

2 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information ReConfigurable Computing, SEAKR’s Core Business oRCC technology is a core technology for SEAKR engineering We are dedicated to developing state of the art RCC and other processing systems. Leverage large diverse customer base –Radiation testing of components –Prevent obsolescence –Fastest development times –Lowest cost systems –High level of integration –Reduced SWaP Creates a sustainable system –Eliminate Stove pipes oDeveloping industry partners for using our RCC technology across subsystems. Flexible platforms that enable reuse among subsystems. Routers, COMSEC, Telecom, SDR, OBP Payload Data Processor COMSEC Routers Telecom Accelerators Software Defined Radio Mass Data Storage

3 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information SEAKR Processing Concept oObjectives Provide sustainable processing platforms for users. –SEAKR algorithms –Users algorithms –SEAKR platforms –Users platforms Provide SEE mitigation technologies for users of SEAKR platforms. –IP cores –System design techniques –Radiation characterization of components Provide technical customer support that specializes in the specific needs of the space community Hardware Architecture Radiation Testing SEE Mitigation Cores Platform (SEAKR, Customer) Algorithms System Application Reliability Testing Board level Or Integrated System SEAKR, Customer, or Combination Thermal Management Structural Design Software API SEAKR Core Technology POL Converters Integrated and cost effective solutions Provide a competitive advantage to users

4 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information 4 Generations of RCC Platforms Four Generations of RCC Platforms V1, V2, V2P/-X, V4 V1-RCC V2-RCC NT-RCC-R NT-RCC V4-RCC

5 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information SEAKR RCC Development oVirtex-I RCC product Four Xilinx XQVR1000 FPGA CO-Processors 256 Mbytes of EDAC R-S Protected SDRAM for each COP Configuration RAM SEU detection and correction Non-Volatile memory for 32 different configurations –Symmetrical FPGA designs Internal PCI bus with PMC slot Cop Interconnect Bus Read and write COP configurations via cPCI cPCI 32/64 33 Mhz, 6U form factor LVDS I/O (Discrete, Serializer/De-serializer) –SERDES capable of 8 Gbps Adopted by GSFC for their laser altimeter program

6 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information Virtex I RCC Block Diagram

7 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information Virtex II RCC Block Diagram

8 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information V2-RCC oFour CoProcessors (COPS) Xilinx XC2V6000 CO-Processors (24M Programmable gates) – 1144 CGA Package 6 Gb SDRAM per COP (on board and mezzanine). 25 GFLOPs oRadiation Tolerant System by Design (RTSD) FPGA mitigation techniques SEU and TID radiation techniques for memories Radiation Tolerant power conversion oNon-Volatile memory for 32 different configurations oData Buses Internal PCI bus (~1Gbps) Shared COP Interconnect Bus (~4.224 Gbps) Pipelined COP bus (~10.0 Gbps) – LVDS cPCI 32/64 33/66 Mhz oLVDS SERDES (24 Gbps aggregate bandwidth) TX 12 Gbps. RX 12 Gbps oMezzanine Card 12 Gbps data rates 4 Gb SDRAM card with aggregate bandwidth of 19.2 Gbps.

9 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information Network Based RCC oSEAKR has performed a trade study on network based RCC processing architectures. oOur Network based design leverages much of our existing architecture and interface. Builds on our existing V2 RCC architecture but changes some of the physical partitioning due to greater Actel AX device capability and adds an 6 to 8 port network switch PCI interface and functionality remains intact. Configuration scrubbing and SEE mitigation is identical Uses existing interface GUI and drivers for configuration control and FPGA communication. oHigh Speed Serial I/O oNetwork protocol

10 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information NT-RCC-R Block Diagram COP A Xilinx V2Pro DDRII Flash Power Switch PCI-PCI Bridge / Config J1J2J3 cPCI PCI COP SelectMap RIO A 6 Port Switch Xilinx V2Pro (NIC) DDR II SDRAM 512 Mbyte QDR SRAM 1M x 36 QDR SRAM 1M x 36 Serial RIO 4X3.125 Gbps Parallel RIO Serial RIO 4X3.125 Gbps NIC SelectMap

11 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information SEAKR NT-RCC-R NT RCC-R Network IF Chip (NIC) oParallel Rapid IO Port o(4) 3.125Gbps serial links off board o(4) 3.125Gbps serial links to COP Parallel RIO Port Configuration Controller/PCI- PCI Bridge Up to 1Gbit NV memory 512MBytes DDRII SDRAM Quad Data Rate SRAMs CO-Processor (COP) o2VP70 o~8Mbits embedded RAM oHSIO to NIC o2 PPC 405 processors HSIO

12 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information NT-RCC Block Diagram COP D XilinxV2Pro COP C Xilinx V2Pro COP B Xilinx V2Pro QDR SRAM 1M x 36 QDR SRAM 1M x 36 COP A Xilinx V2Pro QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 DDRII Flash Power Switch PCI-PCI Bridge / Config J1J2J3 cPCI PCI COP SelectMap Common Bus RIO ARIO B 6 Port Switch Xilinx V2Pro (NIC) DDR II SDRAM 512 Mbyte QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 Serial RIO 4X3.125 Gbps 4X3.125 Gbps Parallel RIO Parallel RIO Serial RIO 4X3.125 Gbps NIC SelectMap 4X3.125 Gbps

13 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information NT-RCC Layout SEAKR NT-RCC o24 Layer board oMicroVias, blind vias, via-in-pad oHigh speed Gbps Serial links o82 pages of schematic capture o10 weeks of PCB layout time

14 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information CGA Qualification Developments oVirtex II CGA Qual CF1144 GSFC Program 52 boards each with four Xilinx Virtex2 CF1144 BGA packages 283 thermal cycles from 0 to 100 C Vibration and shock testing 35mm x 35mm, 1144 pin CGA, 1mm pitch. oMPC7457 CGQ Qual 18 boards with 6 CGA packages/board. 456 thermal cycles -40C to 95C 29mm x 29mm, 483 pin, 1.27mm BGA pitch

15 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information Thermal Management oDesign supports 8 watts per FPGA without heat pipes or other active cooling

16 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information Low Voltage High Current DC/DC Converters oSEAKR has also developed a Point of Load power supply for low voltage, high current systems. Programmable voltage down to 1.0V at 12A 85% efficiency Mezzanine card for design reuse and flexibility Originally developed for G4 SBC VPC Back View POL Power Supply

17 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information PCI Chassis Application oClient application to interface with SBC oDetermines PCI chassis configuration oSends RCC commands to the SBC oUsed for hardware debug and FPGA configuration

18 Aerospace Data Storage and Processing Systems SEAKR Engineering Proprietary Information RCC Built-in Self Test Application