Computer Architecture Mehran Rezaei

2 Welcome

3 Text book Computer Organization & Design: The Hardware/Software Interface David A. Patterson and John E. Hennessy 4 th Edition, Morgan Kaufmann panions/ /

4 Overview Intro to Computer Architecture Administrative Matters Course Style, Philosophy and Structure High Level, Assembly, and Machine Language

5 What is “Computer Architecture” Computer Architecture = ?

6 What is “Computer Architecture” Computer Architecture = Instruction Set Architecture + Machine Organization

7 Instruction Set Architecture... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. Amdahl, Blaaw, and Brooks, 1964SOFTWARE -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Set -- Instruction Formats -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions

8 The Instruction Set: a Critical Interface instruction set software hardware

9 MIPS R3000 Instruction Set Architecture Instruction Categories –Load/Store –Computational –Jump and Branch –Floating Point coprocessor –Memory Management –Special R0 - R31 PC HI LO OP rs rt rdsafunct rs rt immediate jump target 3 Instruction Formats: all 32 bits wide Registers

10 Organization Capabilities & Performance Characteristics of Principal Functional Units (e.g., Registers, ALU, Shifters, Logic Units,...) Ways in which these components are interconnected Information flows between components Data path Logic and means by which such information flow is controlled. Control unit Choreography of FUs to realize the ISA

11 What is “Computer Architecture”? Coordination of many levels of abstraction Under a rapidly changing set of forces Design, Measurement, and Evaluation I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware Datapath & Control Layout

12 Forces on Computer Architecture Computer Architecture Technology Programming Languages Operating Systems History Applications

13 Administrative Stuff

14 Course Style (overview handout) Grade breakdown –Midterm Exam: 20% –Final Exam:30% –Project:30% –Homework Assignments:20% No late homework Passing Grade –Project + Homework : necessary requirements –Reasonable grades on exams (50% above)

15 Course Problems Can’t make midterm –Tell me early and we will schedule alternate time Forgot to turn in homework or any other problem –Zero for that assignment What is cheating? –Studying together in groups is encouraged –Work must be your own –Common examples of cheating: running out of time on a assignment and then pick up output, take homework from box and copy, person asks to borrow solution “just to take a look”, copying an exam question,... –Better off to skip assignment

16 Reading Assignments For the first half of the course, every week, you will have reading assignments. –Every lecture, 5 minutes, about the reading assignment –Time to time, break out from the text book

17 Course Materials (Systematically) Instruction Set Architecture Computer Arithmetic, ALU Measuring the performance of computer system CPU design, single cycle and pipelined CPU Memory Systems I/Os

18 Where are we? Intro to Computer Architecture Administrative Matters Course Style, Philosophy and Structure High Level, Assembly, Machine Language

19 High Level Language Program Assembly Language Program Machine Language Program Control Signal Specification Compiler Assembler Machine Interpretation °°°° ALUOP[0:3] <= InstReg[9:11] & MASK High Level, Assembly, Machine language, and control signals temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw$15,0($2) lw$16,4($2) sw$16,0($2) sw$15,4($2)

20 Levels of Organization (computer Anatomy) SPARCstation 20 Processor Computer Control Datapath MemoryDevices Input Output Workstation Design Target: 25% of cost on Processor 25% of cost on Memory (minimum memory size) Rest on I/O devices, power supplies, box

21 Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

22 A Prediction by Gordon Moore Courtesy of the graph – Cramming more components onto integrated circuits, Electronics, 38(8), April 1965

23 The Growth in CPU Speed (lately) J. S. Emer Sources: J. S. Emer. “Simultaneous Multithreading: Multiplying Alpha's Performance”, 12 th Microprocessor Forum, October R. E. Kessler R. E. Kessler. “The Alpha Microprocessor”, IEEE Micro, 19(2), pp. 24­36, March/April V. A. Klauser V. A. Klauser. “Trends in High­Performance Microprocessor Design”, Telematik, 7(1), pp. 12­21, April 2001.

24 Pace In Memory Speed J. L. Hennessy and D. A. Patterson Courtesy of the table:J. L. Hennessy and D. A. Patterson. ``Computer Architecture A Quantitative Approach'', Morgan Kaufmann Publishers, Third Edition 2003.

25 CPU-Memory Speed Gap J. L. Hennessy and D. A. Patterson Courtesy of the Graph:J. L. Hennessy and D. A. Patterson. ``Computer Architecture A Quantitative Approach'', Morgan Kaufmann Publishers, Third Edition Ever-increasing CPU-Mem S-Gap