1. EECS 362 Computer Architecture Projects Lecture 1 Instructor: Alok Choudhary Co-instructor: Avery Ching

2. Outline Course Overview Course Overview Administrative Matters Administrative Matters Course Structure Course Structure Recap of Pipeline Processor Recap of Pipeline Processor First Week’s Assignment First Week’s Assignment

3. Course Overview Course involves the design and evaluation of a pipelined processor: Course involves the design and evaluation of a pipelined processor: ISA design ISA design Design and test of components Design and test of components Design and test of datapath/control Design and test of datapath/control Evaluating for correctness and performance using benchmark programs Evaluating for correctness and performance using benchmark programs The target instruction set is a subset of the DLX ISA The target instruction set is a subset of the DLX ISA If you haven’t taken EECS 361 - Drop the class! If you haven’t taken EECS 361 - Drop the class!

4. Course Information Instructor: Professor Alok Choudhary Room: L469 Tech Room: L469 Tech Phone: (847) 467-4129 Phone: (847) 467-4129 E-mail: choudhar@ece.northwestern.edu E-mail: choudhar@ece.northwestern.edu Office Hours: TBD Office Hours: TBD Co-instructor: Avery Ching Room: L460 Tech Room: L460 Tech Phone: (847) 467-2299 Phone: (847) 467-2299 E-mail: aching@ece.northwestern.edu E-mail: aching@ece.northwestern.edu Office Hours: TBD Office Hours: TBD Teaching Assistant: Kenin Coloma Room: L460 Tech Room: L460 Tech Phone: (847) 467-2299 Phone: (847) 467-2299 E-mail: kcoloma@ece.northwestern.edu E-mail: kcoloma@ece.northwestern.edu Office Hours: TBD Office Hours: TBD Class web page:http://www.ece.northwestern.edu/~aching/EECS362/ Textbooks: The DLX Instruction Set Architecture Handbook (provided by instructors) Philip M. Sailer and David R. Kaeli Philip M. Sailer and David R. Kaeli Morgan Kauffman Publishers, 1996. Morgan Kauffman Publishers, 1996. Computer Organization and Design: The Hardware/Software Interface David A. Patterson and John L. Hennessy David A. Patterson and John L. Hennessy Morgan Kaufmann Publisher, 2002 or 2005 Morgan Kaufmann Publisher, 2002 or 2005

5. Course Philosophy The entire class will be a project class. The entire class will be a project class. One of the two classes (Thursdays), each group will meet me individually. Each group will meet for 25 minutes. One of the two classes (Thursdays), each group will meet me individually. Each group will meet for 25 minutes. The other class (Tuesdays) requires each group to make a 25 minute presentation to rest of the class. The presentation should be professional and put on the web. The other class (Tuesdays) requires each group to make a 25 minute presentation to rest of the class. The presentation should be professional and put on the web. Each group will do the following: Each group will do the following: Describe goals for the current week (and if they were accomplished) Describe goals for the current week (and if they were accomplished) Goals for the next week Goals for the next week Problems and difficulties encountered and how they were solved Problems and difficulties encountered and how they were solved Put all the material including the talk and summary of progress on their group web page (latest by one day after it was presented to get credit for it). Put all the material including the talk and summary of progress on their group web page (latest by one day after it was presented to get credit for it). Grading Grading 30% weekly progress 30% weekly progress 70% final project and results (due on last day of class with the report) 70% final project and results (due on last day of class with the report)

6. What is available? dlxcc - a C compiler for DLX dlxcc - a C compiler for DLX dlxasm – an assembler for DLX dlxasm – an assembler for DLX dlxsim and dlxview – a command-line and graphical DLX simulator. Used to determine correct program behavior for debugging. dlxsim and dlxview – a command-line and graphical DLX simulator. Used to determine correct program behavior for debugging. Description of these tools are available in the book and on the course web page. Description of these tools are available in the book and on the course web page. Both executables and original sources are available – benchmarking and testing programs will be provided as the course progresses. Both executables and original sources are available – benchmarking and testing programs will be provided as the course progresses. Also, see the web site given in the book and at MKP (www.mkp.com). Also, see the web site given in the book and at MKP (www.mkp.com).

7. DLX ISA Most similar to MIPS Most similar to MIPS Load/Store Load/Store 32 GP registers 32 GP registers 32 Single precision FP registers 32 Single precision FP registers

8. MIPS R3000 Instruction Set Architecture Instruction Categories Instruction Categories Load/Store Load/Store Computational Computational Jump and Branch Jump and Branch Floating Point Floating Point coprocessor coprocessor Memory Management Memory Management Special Special R0 - R31 PC HI LO OPrsrt OPimmediate OPtarget rdsafunct Instruction Format F0 - F31

9. A Pipelined Datapath IF/ID Register ID/Ex Register Ex/Mem Register Mem/Wr Register PC Data Mem WA Di RADo IUnit A I RFile Di Ra Rb Rw MemWr RegWr ExtOp Exec Unit busA busB Imm16 ALUOp ALUSrc Mux 1 0 MemtoReg 1 0 RegDst Rt Rd Imm16 PC+4 Rs Rt PC+4 Zero Branch 1 0 Clk IfetchReg/DecExecMemWr

10. What to Do Next Form groups of 3-4 (work in a team) Form groups of 3-4 (work in a team) First week First week Go through the software and documentation (will be helpful to you in understanding how you would develop your design) Go through the software and documentation (will be helpful to you in understanding how you would develop your design) The simulator does not tell you how to design the processor The simulator does not tell you how to design the processor Understand instruction set for DLX Understand instruction set for DLX Give thought to how you would design a pipelined processor Give thought to how you would design a pipelined processor Present your thoughts during the second class (Tuesday – 1/9/2007) of second week Present your thoughts during the second class (Tuesday – 1/9/2007) of second week Toolset tutorial for those who need it this upcoming Thursday 1/11/2007 in L460 Toolset tutorial for those who need it this upcoming Thursday 1/11/2007 in L460 Each of the n groups should then present 1/n th of the DLX ISA. Each of the n groups should then present 1/n th of the DLX ISA. Register Ops Register Ops Branch/Jump Branch/Jump Load/Store Load/Store Floating Point and Others Floating Point and Others Each week document each group member’s contributions on group website Each week document each group member’s contributions on group website