R2D2 team R2D2 team Reconfigurable and Retargetable Digital Devices  Application domains Mobile telecommunications  WCDMA/UMTS (Wideband Code Division Multiple Access)  MIMO (Multiple-Input Multiple-Output) techniques High speed and secure network  Trafic filtering (intrusion detection system)  Cryptography Image indexing ASIC Processor Memory Reconfigurable FPGA Reconfigurable DART DSP Goal: search for the best compromise between high-performance, power consumption and flexibility using reconfigurable hardware

R2D2 team R2D2 research fields (1)  Compilation, synthesis targeting reconfigurable architectures High-level synthesis from high-level specifications  Compilation of loop nests to parallel circuits (MMAlpha)  High-level synthesis of control dominated specifications using Hierarchical Conditional Dependency Graphs (CODESIS)  High-level synthesis from behavioural VHDL (BSS)  Specialized microcontroller synthesis on FPGA Retargetable compilation and processor core modelling  Processor modelling (Armor language)  Flexible compilation for ASIP (CALIFE) Floating point to fixed-point conversion methodology targeting software (DSP) and hardware (FPGA)

R2D2 team R2D2 research fields (2)  New architectures and technologies Coarse-grained reconfigurable architecture (DART reconfigurable data path) Memory hierarchy in specialized System-on-Chip Reconfigurable architectures for control intensive applications Network on chip (NOC) design using advanced mobile telecommunication techniques Wireless sensor networks (energy efficiency optimisation) Multiple-valued logic (MVL) architectures and circuits  Prototyping of applications on reconfigurable platforms 3G and 4G mobile application prototyping  WCDMA on the Lyrtech DSP/FPGA platform  MIMO