Dec 7, 1999D0 Dir Review Inst/Com DØ Silicon Hookup and Commissioning p Goals and timeline p Overview of Silicon Read out p “Stand alone” commissioning.

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Presentation transcript:

Dec 7, 1999D0 Dir Review Inst/Com DØ Silicon Hookup and Commissioning p Goals and timeline p Overview of Silicon Read out p “Stand alone” commissioning p Cosmic Ray Stand p Barrel / Disk read-out p Commissioning in Collision Hall Marcel Demarteau Fermilab Outline Director’s Review on Installation and Commissioning

Dec 7, 1999D0 Dir Review Inst/Com Goals p Ensure data integrity at the level of , i.e allow for loss of 1 bit in bits transferred p Provide adequate operating margin for device p Ensure adequate diagnostics tools and controls p Exercise control logic p Exercise Data Acquisition and filtering scheme p Exercise offline software Timeline p Commission read out electronics in phases “on the bench” without detectors attached p Integrate final components as soon as available p Read out small scale setup in final configuration p Enlarge scope of read out

Dec 7, 1999D0 Dir Review Inst/Com Current Status p Complete read out system installed in cleanroom in LabC p Final version of all read out components, except Interface Board p System run in checksum mode in Level 3 node »SVX chips downloaded to read out set data value »All channels read out; data constant »Calculate checksum (sum of all bits) in VBD »Data transferred to L3 node; checksum compared »If checksum different: read in and analyze even

Dec 7, 1999D0 Dir Review Inst/Com A)Ran with multiple VME Read out Buffer (VRB) boards, without low mass cable and long transmission line, with direct regeneration of signals at hdi, 3-chip hdi’s only System equivalent of ~22,000 channels Data transfer on VME at ~ 12 Mbytes/s p Very low noise on data transfer backplane p Proper handshaking between read out elements p Data integrity > (~ 1 non-fatal error every ~30 minutes) B)Ran with single chain (hdi) in close to final configuration, including low mass cable, 30’ 3M/50 conductor cable. Optimized impedance matching for data and control lines on sending and receiving ends p Successfully operated all hdi types p Mapped out operating margin for all hdi types p Data integrity > for all hdi types with comfortable operating margin C)Written raw data to disk, unpacked and analyzed “offline” within L3 framework and online monitoring program (Examine)

Dec 7, 1999D0 Dir Review Inst/Com DØ - D7 Data bus lines Clock strobe Read out at 53 MHz DValid 18.8 nsStrobe channel idStrobe data 7-8 ns Operating Margin Upper limits Bus lines D0/D7 WCLK and DVALID signal risetime of 2-3 ns

Dec 7, 1999D0 Dir Review Inst/Com Schedule and Resources p 12/05/99: Expand to 6 chains with low mass configuration p 12/15/99: Implement new interface board »50  80 conductor cable with SVX power provided through cable »monitoring capabilities added Verification of data acquisition and data integrity will be ongoing effort

Dec 7, 1999D0 Dir Review Inst/Com Cosmic Ray Setup p Install up to 12 ladders in spare Be support structure and exercise full read out system, DAQ, L3 and on/offline software, controls and monitoring p First step in trying to operate full barrel disk Array of 4 scintillator counters form external trigger Momentum analyzing steel, p T  > 2 GeV/c Data Rate ~ 1 cosmic/min Ladder installation in progress

Dec 7, 1999D0 Dir Review Inst/Com Setup p 6 ladders read out through low mass cable in final configuration p 6 ladders read out through high mass cable: Total of 9216 channels p Barrels will be cooled and interlocked p First cosmic ray recorded 12/20/99 Ingredients 4 Detector Control and Monitoring 4 Secondary Data Path 4 Data Acquisition 4 Online data monitoring (Examine)

Dec 7, 1999D0 Dir Review Inst/Com Detector Controls and Monitoring All slow controls and monitoring uses 1553 protocol 1553 interface to Si detector only available with new Int.Brd. Detector Readout Crate Controls Crate UNIX Hosts Control Room PCs EPICS Clients: SVX Download Low Voltage High Voltage 1553 Devices Rack Monitor EPICS Clients: SVX Download Low Voltage High Voltage 1553 Devices Rack Monitor Controls Ethernet ORACLE Hardware Database EPICS DB Generator Download of Sequencer and SVX chips, not optimized 4 SVX and bias Voltage control done, need implementation p 1553 Monitoring devices, currents, temperatures p Cooling monitoring and interlock p Oracle database design population and interface Available In progress

Dec 7, 1999D0 Dir Review Inst/Com Secondary Data Path Detector Readout Crate Host Processor: Calibration Host Processor: Calibration ORACLE Hardware Database Pwr PC Pwr PC Motorola 68k or Power PC Ethernet PTP Connection Intended for calibration processes and monitoring For Silicon: calculation of pedestals and gains p Front-End software finished as stand alone Available In Progress p Porting to cosmic ray setup Jan 00 p Exercise system Feb 00 p Database interface first pass March 00 p Database retrieval April 00 L3 Node

Dec 7, 1999D0 Dir Review Inst/Com Run Configuration p Module addressing and read out »chip id, pedestal, gain, ladder barrel, Temp address, I address Oracle Database Readout Configuration Geometry parameters Calibration Constants Monitoring Devices Control Parameters

Dec 7, 1999D0 Dir Review Inst/Com Data Acquisition Detector L1/2 Trig Simul L3 Supervisor L3 VRC Readout Crate L3 Filter Collector / Router Data Logger Data Logger Disk Data Cable UNIX Hosts NT Level 3 Ethernet Trigger and Readout Data Distributor Data Distributor Control Room PCs Examine p All pieces to exercise full data acquisition chain are in place p Read out to L3 system extensively tested p Online Examine SMT analysis code tested on raw data p First pass at full read out with 12 ladder test Dec 99/Jan 00 p Will slowly ramp up to enlarge read out and complexity of tools p L3 Tools: data unpacking, hit finding, track reconstruction

Dec 7, 1999D0 Dir Review Inst/Com Timeline for development p Dec 99: »6-12 ladder setup and test controls and monitoring p Dec 99 - Jan 00: »Cosmic Ray data taking; online monitoring with Examine p Feb 00: »First pass at L3 filtering and alignment »First pass at secondary data path p Mar 00: »Database integration

Dec 7, 1999D0 Dir Review Inst/Com p March 15/00: »Hook up of full H-disk, 48 detectors, channels; exercise all components p April 1/00: »Hook up barrel, 72 detectors p April 15/00: »Hook up barrel and F disk, 96 detectors (~10%) p May 1/00: »15 more detector assemblies to go (5 barrel/disk, 6 F disks, 1+3 H disks) »one week for read out and debugging per assembly »Done Aug 15/00 »Note, doubling the time per assembly (23 assemblies) would give completion date of Oct 7/00. Still adequate (7 H disk assemblies can go last) Timeline So far discussed development on small scale system (12 ladders) and commissioning of read out system. Move to full subsystem in March 00. No assembly (barrel or disk) leaves the silicon facility without having been read out.

Dec 7, 1999D0 Dir Review Inst/Com Meanwhile in the Pit platform SEQSEQ SEQSEQ SEQSEQ SEQSEQ SEQSEQ SEQSEQ VRB Controller Optical Link 1Gb/s 3/6/8/9 Chips Sensor VBDVBD VRBVRB VRBVRB VRBVRB VRBVRB 68k68k Secondary Datapath VMEVME Low Mass 3M NRZ / CLK SVX EMULATOR IBIB Monitoring Control L3HOST Examine Concurrent with work at the silicon facility, a complete shake down of the read out system will take place at the assembly hall of final read out configuration downstream from the interface board, including online data checking (Examine). See M. Johnsons presentation

Dec 7, 1999D0 Dir Review Inst/Com Barrel and disk hookup at DAB p Hookup of cooling system immediately p Run coolant above dewpoint, so no damage to detectors. Procedure verified at silicon facility p Starting 9/26/00, 5 weeks allocated for check out of silicon detector p 1.5 weeks allocated for cabling each detector end. Note, read out has HDI-enable line, therefore, system can be fully powered at hookup time, thus instant hdi checkout. Procedure should be developed at silicon facility during full barrel/disk tests p Complete Barrel and F disk hookup in 3 weeks. »Assuming 7days/week, 12hrs/day, this gives ~20 mins of debugging time per hdi p Two additional weeks for debugging complete barrel and F disk assembly. Hookup of H disks in parallel.

Dec 7, 1999D0 Dir Review Inst/Com Resources

Dec 7, 1999D0 Dir Review Inst/Com Summary p Read out system will be verified continuously. Current level of data integrity for single hdi would be adequate. p Partial barrel with cosmic ray data taking first step to final system configuration p All system components will be exercised at the silicon facility and procedures developed for DAB hookup and commissioning p Many DAQ components exist already in stand alone form, but are not integrated. p All full assemblies will have been read out at the silicon facility before installation. Development of procedures at facility crucial. 4 Schedule is tight but feasible