1. D0 PMG February 15, 2001 PMG Agenda February 15, 2001  Overview (Weerts) u Detector status u Reportable milestones u Summary  Operations Organization (Womersley)  Next few weeks & operations (Kotcher)  Detector completion ( Weerts)  Engineering needs (Johnson)

2. D0 PMG February 15, 2001 Installation update View of collision hall Feb 14, 2001 Feb 6, 2001 Feb 9, 2001

3. D0 PMG February 15, 2001 Status Overview: SMT  Silicon u Silicon detector (SMT-S & SMT-N) s Installed s Infrastructure (cooling, air) u H-disks ( need 4) s 4 H disks installed u Infrastructure s Cooling system hooked up s More later under electronics

4. D0 PMG February 15, 2001 Fiber Tracker Status  Waveguide Production and QC continue at a very small scale; use less fiber ( $100K  $50K)  Installation Waveguides u South & North: done  VLPC cassettes Goal (99): projection was Feb 26, 2001 now mid March, due to AFE testing 91 fabricated, 87 characterized, 66 @D0, 12 more ready for DØ

5. D0 PMG February 15, 2001 Status Overview  Central Muons (94 PDT’s) u Commissioning continues u Triggering on tracks  Forward Muon detectors u All commissioned, except B layer pixels; u C layer pixels to finish ( timing)  Gas systems (recircl. & clean) u Being installed LayerPixelsMDT’s A North & South: done North & South: done B North & South: done North & South: done C North & South: done Installation status

6. D0 PMG February 15, 2001 Status Overview; Electronics  Electronics u Calorimeter s Preamp installation/commissioning underway (55k installed: all done, EN & CC power ready, cooling installed, ES going in) s BLS status –Motherboard: 1250/1200/1020 – need/bare/stuffed – ( no progress: 50/week; should 100/week) –Daughter cards 5000/5000/4220 –Daughter card: 300/week should; but none in last few weeks ( ORACLE SUNYSB ??) –CC, ECN were cold and filled with liquid; now empty –Have 4 out of 12 timing modules ( boards being assembled) s Have read out 4500 channels u Muon s Done

7. D0 PMG February 15, 2001 u Tracking Electronics s Si Interface Card –144 needed –All boards in hand –144-4 tested and ready s Adapter card –Done fabricating –& installed south side s Analog Front End boards –Remake the PCB’s (148)( second set) –Release Feb 19 –PCB status clear: remake !!! –Have 10 prototype boards –4 stuffed; 2 being tested –Tests look promising, but have to continue –Latest release date for stuffing March 19 s MCM going –At FNAL 2220; need 2200 s Power supplies –Being installed Status Overview; Electronics SMT Fiber tracker

8. D0 PMG February 15, 2001 Si Sensor To and from DAQ Description # need # have Location HDI with SVX --in SMT 8’ Low mass cables & clock cables 720 192H 757 232H SMT support cylinder to CC face Adapter card 144* 4 Installed on CC face ( 144*2) 19’-30’ High Mass Cable; 3M/80 Conductor & clock cables 144* 4 144*4 ( found all) ~288 (south) installed Interface card 144 east & west side of CC; going in 25’ High Mass; 3M/50 Conductor 144* 4 144*4 ( missing, reorder or spares) To sequencer; 3* 144 in SMT readout front end system status

9. D0 PMG February 15, 2001 Description # need # ready Location Waveguides from CFT (axial & stereo), CPS, FPS - CFT & CPS DONE From face of CC to platform VLPC cassettes9987platform AFE 8 with 8 MCM’s; readout axials & stereo 136 incr. 10 proto problem On VLPC cassttes MCM; multichip module with SIFT & SVX chip 22002212 On AFE xx boards AFE 12 read out stereo, CPS, FPS 62 Progress design On VLPC cassettes Mixer boards (trig) 20 2 end of March; Prototyp es on way Digital part (trig) 40 24 & arriving platform Fiber tracker readout front end system status DAQ AFE 8 VLPC AFE 12 VLPC CFT, CPS, FPS L1 Trig Infrastructure installed

10. D0 PMG February 15, 2001 Status Overview  Trigger u Final hardware arrival is a worry  Level1:  CFT trigger; digital parts arriving March  CAL few towers on March 1 & run; delivery in March  Muon ~2octants in central & 1 in each end; arriving in March & April  L2 VME-Alpha boards still a concern. Looking better: 25 produced; 3 partially working; 6 completely working. Expect another 2 to rise from dead.  Three approaches:  Effort in CD continues (THANKS)  Another production run. Have parts for 12 boards.  New design completely…..  L3 board production concern  Abandoned high speed SIB design on PCI card with high bandwidth IN and OUT  Goal now is to achieve 50 to ~150Hz in April  Two critical boards (SIB, VBDi). SIB have boards, VBDi going out  Online u In use at low rate, not on critical path

11. D0 PMG February 15, 2001Summary  Concerns u Installation: Mechanically complete u Electronics delays are THE concern for realistic commissioning with beam s Vendor delays, parts availability  Outlook u “Detector” will be ready for beam on March 1 u All detectors will be installed u Not completely hooked up u Limited data rate in DAQ ~few Hz u Will need TIME after start up to complete the detector electronically ( see later)

12. D0 PMG February 15, 2001 Level 3 overview SB o o o SB o o o SB o o o SB o o o VRC (1 of 8) VBD o o o VBD o o o ETG Data Collection Paths (8 * 2 * 48 MB/s) Primary Fiber Paths (8 * 100 MB/s) L3 data distribution to Level 3 farm event tag path Node Level 1,2 Trigger Info