Tejas Bhatt and Dennis McCain Hardware Prototype Group, NRC/Dallas Matlab as a Development Environment for FPGA Design Tejas Bhatt June 16, 2005

Outline Requirements for Rapid Hardware Prototyping Requirements for Rapid Hardware Prototyping Matlab – As a Research and Development Tool Matlab – As a Research and Development Tool Fixed-point Design in Matlab Fixed-point Design in Matlab Matlab Based FPGA Design Flow Matlab Based FPGA Design Flow Conclusion Conclusion

Motivations for Prototyping Performance Measurement Performance Measurement –Real-time performance evaluation –Technology proof-of-concept –HW/SW partitioning & architecture trade-offs Product Development Product Development –Easier technology transfer –Early detection of implementation bottlenecks –Speed-up time-to-market Business Motives Business Motives –Marketing the technology –Technology demonstration –Technology assessment

Design Flow Requirements Rapid Transition: Algorithm  HW Implementation Rapid Transition: Algorithm  HW Implementation –Common platform for R & D –Stronger link between simulation & implementation –Common test-bench for floating-point and RTL Flexibility and Re-Programmability Flexibility and Re-Programmability –Supports ongoing research and improvements –Allows for parameter optimization –Allows evaluation of different architectures Simple Simple –Less time in verification  simplified test-bench –Easier development  e.g. fixed-point conversion –HW/SW co-simulation

FPGA for Prototyping High Processing Power High Processing Power –Handle complex algorithms –High through-put applications –Allows for a high degree of parallelism Fast Design Flow Fast Design Flow –Well-supported in EDA community –Easily reconfigured when design changes Re-Configurable Hardware Re-Configurable Hardware –No need for rigorous front-end verification Cost-Effective Compared to ASIC in small volumes Cost-Effective Compared to ASIC in small volumes

Matlab: A Research Tool Ease of Use Ease of Use –Simple, familiar interface –Intuitive matrix/array processing –Improved simulation speed – JIT, faster HW, C-MEX interface Fast Simulation Development Fast Simulation Development –Various toolboxes / library functions –Effective data processing – Plots, fast statistics  simple test-bench Generates Functional Specifications Generates Functional Specifications

Matlab: System Development Tool WHY ? WHY ? –Straightforward transition from R to D –Common interface between researchers and designers – Less time required for technology transfer – Easier iteration on algorithm improvements Requirements Requirements –Fixed-point modeling – Transparent to researcher –Implementation specifications for HW/SW – Access to basic operations – adders, multipliers etc. –Verification of RTL implementation – Test-vector generation – Test-bench: co-simulation

Matlab-From Research To Development Matlab-based Development Flow Matlab-based Development Flow

Fixed-Point Algorithm Development Traditional Approach Traditional Approach –Toolbox functions to user-defined functions –Convert Generic M-code –to– Flat M-Code –Verify Performance with Fixed-Point Interface –Determination of fixed-point attributes –Optimization of different functional units

Fixed-Point Algorithm Development Example: HSDPA Chip Equalizer Chip Equalizer for HSDPA System Chip Equalizer for HSDPA System –LMMSE Equalizer to counter multipath in HSDPA –3-Main Blocks – Correlation Matrix Computation (R-Matrix) – FIR Tap Computation (w-vector) – FIR (d = wr) – FIR (d = w H r)

Fixed-Point Algorithm Development Example: HSDPA Chip Equalizer Chip Equalizer for HSDPA System… Chip Equalizer for HSDPA System… –Matrix-Inverse handled using FFT/IFFT –Intuitive Operations –Matrix Multiplication, FFT/IFFT, Sub Matrix Inverse –Basic Operations – Multipliers, Adders, Dividers Rx Data

Fixed-Point Algorithm Development Example: HSDPA Chip Equalizer Traditional Approach Traditional Approach –Convert Generic M-code –to– Flat M-Code – Toolbox functions to user-defined functions – Intuitive (Matrix) to Basic (Add, Sub) Operations – C-Like coding to understand data-flow

Fixed-Point Algorithm Development Example: HSDPA Chip Equalizer Traditional Approach… Traditional Approach… –Verify Performance with Fixed-Point Interface – Determine Required Input/Output Word-lengths –Determination of fixed-point attributes – Simulations to determine Data Range – Add Checks to verify overflow/underflow

Fixed-Point Algorithm Development Traditional Approach… Traditional Approach… –Optimization of different functional units – Optimize word-lengths of multipliers, adders etc. – Verification with simulations Bottlenecks in Traditional Approach Bottlenecks in Traditional Approach –Fixed-Word-length “doubles” instead of true fixed- point data types –Hand coding for overflow checks –Complex algorithms – Many variables and operations  slow simulation – Prone to errors –May require translation to fixed-point C to speed-up the simulation

Fixed-Point Algorithm Development Requirements For Automated Design Flow Requirements For Automated Design Flow –User friendly –Fixed-point data-types – Transparent to user –Automated Process for word-length determination –Easy accommodation of legacy Matlab code Possible Approaches Possible Approaches –Matlab fixed-point –Third-Party Matlab fixed-point tool box – E.g. Catalytic

RTL Development Hand-Coded VHDL Hand-Coded VHDL –Special expertise is required –Time consuming, complex, and not easily modified Graphical Schematic Capture (HDL Designer, HDS) Graphical Schematic Capture (HDL Designer, HDS) –Intuitive (block-diagram based) –Manual layout  fixed architecture –Great for HW integration Automated (e.g. Catapult C) Automated (e.g. Catapult C) –C/C++ level abstraction –Easy to analyze architectures and scheduling –Algorithm must be partitioned  think architecture –Fixed-Point C + C-MEX  Matlab as test-bed

Matlab Based Design Flow RTL Design RTL Synthesis FPGA P & R Candidate Algorithms Fixed-Point C / C++ HDL Generation Architecture Analysis Custom IP Block Implementation APTIX NALLATECH FPGA Platforms WILDCARD Floating/Fixed-Point MATLAB or C-Code Technology Transfer Level Fixed-Point Design

Matlab As a Test-Bench for RTL Validating Fixed-Point C Validating Fixed-Point C –Manual translation from M to C –Fixed-point C can be called from Matlab test-bed Manual/Automated translation of fixed-point C to RTL Manual/Automated translation of fixed-point C to RTL RTL Simulation RTL Simulation –Matlab as a test-bench –Stand-Alone – File I/O –Possible Option – Co-Simulation – Matlab to ModelSim Link Validating FPGA Implementation Validating FPGA Implementation –Stand-Alone – Simulate captured data in Matlab –Co-Simulation – Matlab to PCMCIA (e.g. WildCard)

Conclusion Advantages of Matlab Based Design Flow Advantages of Matlab Based Design Flow –Allows quick development of simulation/algorithm –Enables faster transition from algorithm to architecture –Common test-bench between floating-point and RTL implementation –Matlab based design flow cuts the overall development time Major Bottlenecks Major Bottlenecks –Laborious Floating-point to Fixed-point transition – Fixed-point word-length and range analysis – Fixed-point data types –Manual transition from M to fixed-point C code –Partitioning C Code in different functional units

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