1. EMT 351/4 DIGITAL IC DESIGN
Week # 1
EDA & HDL

2. In Previous Semester..
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3. In This Semester..
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4. Systematic Digital IC Design Flow
System Specification
System Verification
（System-Level Synthesis）
Algorithm-Level Behavioral Description
Behavioral Verification
（High-Level Synthesis）
Register-Transfer Level (RTL) Structural Description
Logic Verification
Logic Synthesis
Logic/Transistor Circuit Description
Layout Verification
Layout Synthesis
VLSI Mask Layout
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5. System Specification System Specification
Human language
(English, Japanese, Thai, etc.)
System Specification
System functionality (application)
Operating environment (IO interface)
Cost (development, manufacture, test)
Size/weight (# of chips, board area, box size)
Power consumption
Flexibility (specification changes, added functionality)
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6. System Synthesis/Verification
System Specification
Human language
Functional Simulation
(SW/HW co-simulation)
manual translation
Software languages (C/C++, Java)
Hardware languages (Verilog, VHDL)
Algorithm Description
Data : types/widths, structures, arrays
Process : expressions, control-flow, procedures, functions
Communication : protocols
Simulation : input stimulus, output verification
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7. High-Level Synthesis / Verification
Software languages (C/C++, Java)
Hardware languages (Verilog, VHDL)
Algorithm Description
manual translation
(High-Level Synthesis）
Functional Simulation
RTL Structural Description
Verilog, VHDL
Architecture description
Module (CPU, memory, register, functional unit, IO interface)
Bus architecture
Module description (functional/structural)
Combinational/sequential circuit description
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8. Logic Synthesis/Verification
RTL Structural Description
Verilog, VHDL
Logic Verification
Timing Verification
Power analysis
Logic Minimization
Technology Mapping
Verilog, VHDL
Schematic
Netlist
Logic/Transistor Circuit Description
Cell components (gates, registers, transistors)
Nets
IO pins
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9. Layout Synthesis/Verification
Verilog, VHDL
Schematic
Netlist
Logic / Transistor Circuit Netlist
Circuit topology verification
Design rule check
Timing Verification
Cell / module layout (manual or auto)
Place and Route
VLSI Mask Layout
Mask Pattern
Layers (well, diffusion, polysilicon, metals, vias)
Rectangle, polygons
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10. CAD/EDA Tools
Electronic design automation (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits.
This is sometimes referred to as ECAD (electronic computer-aided design) or just CAD.
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11. Cont..
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12. What is HDL ? HDL – Hardware Description Language
Used to describe the logic functionality of a circuit
Can also describe the behavioral aspects of a circuit function
Sometimes used to show the netlist of a circuit
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13. Cont.. Types of HDL Verilog
VHDL (VHSIC HDL – Very High Speed Integrated Circuit Hardware Description Language)
Latest type of HDL
C/C++ code – not widely accepted
Superlog – very new. Mostly still under research
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14. Importance of HDL
Designs can be described at very abstract level using HDL
can write without sticking to any technology
Functional verification can be done early in the design cycle
can optimize & modify RTL description until meet desired functionality
HDL design is analogous to computer programming
provide concise representation of design compared to schematic
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15. VHDL vs Verilog Always an argument on which is a better form of HDL
Both has its advantages and disadvantages
Whichever is more suitable to be used as the standard HDL depends largely on individual designer
Most EDA/CAD design tools in the market can handle both Verilog & VHDL
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16. Cont.. Verilog Easy to write.
Easy to read & understand as it is similar to C.
Easier to learn compared to VHDL
All design centres in Malaysia uses Verilog.
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17. Cont..
VHDL
It is more complicated & more difficult to learn compared to Verilog
More coding rules to follow
More flexible compared to Verilog
Can reflect real design more efficiently
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18. Introduction to Verilog
Many companies uses Verilog
Can be divided into 3 types of Verilog
Structural
– netlist format
Behavioural
– mostly used for analog circuit
RTL
– describes the functionality of circuit and synthesizable codes
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19. What is RTL? RTL (Register Transfer Level) – synthesizable codes
Some design tools in market capable to auto-generate RTL based on graphical modes
Graphical entry can be in the form of flowcharts, truth tables, state diagrams
With good RTL coding styles, timing and area can be greatly optimized
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20. Designing Dilemma..
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