Commissioning of CSCs and Peripheral Crates Task L M. Ignatenko UCLA October

Start of CSCs installation The installation of cathode strip chambers started in June 2003 Installation of the first chamber on an iron disk. The chambers were installed layer by layer and then were cabled.

432 CSCs have been installed including 72 Dubna chambers

Installation of the ME+1/3 chamber 36 ME-1/3 CSCs need to be installed

CSC’s Readout Electronics CSC CFEB ALCT 1 of 24 CFEB 1 of 2 LVDB AFEB CFEB ALCT MPCMPC DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB CCBCCB VMECONTROLLERVMECONTROLLER Peripheral Crates (on iron disks) DCS TTC Crate Track Finder Crate Readout Data FED Crates (in USC55) in USC55 TMB-RAT DMB CCB MPC DDU DCC 1 of 5

38 Peripheral Crates (out of 60) have been installed

MTCC PC commissioning on + side

Portable set-up for CSC commissioning

4 – AFEB analog noise & threshold 2 – Anode connectivity 5 – SCA noise 3 – Cathode connectivity 1. Slow Control V/I 6 – Comparator noise 7 – Comparator logic 8 – Chamber noise at nominal HV List of CSC Tests It takes usually 4-6 hours to test one chamber in perfect conditions It can take a number of days to find a problem, eliminate it and retest the chamber in question

Skew-clear cable revision problem 1.It was found that we have two type of skew clear cables: Production Revisions A and B - have delay 4.7 ns/meter Production Revisions C and D – have delay 5.2 ns/meter 2.They differ in terms of data transfer capability:

Chamber noise problem 360 Hz 590 Hz Each th installed chamber needs training either at 3.8 kV or with reverse HV at kV. Training of chambers with reverse HV polarity helped in most cases. Two chambers had to be replaced because the training didn’t help ME+2/2/ ME+4/1/ Noisy channels

Unexpected cross-talks ME-3/2/ ME+3/2/ Test pulse was sent to the test strip of the plane #3 Test pulse was sent to the test strip of the plane #4

AFEB problems 1ME+3/2/15-051AFEB#21Flaky behavior of ch #53 pl #5 2ME-3/2/12-110AFEB#7Dead channel #17 in plane #2 3ME+2/2/30-130AFEB#12Dead channel h#29 in plane #6 4ME+3/1/11-017AFEB#27Dead channel #65 in plane #5 5ME+2/2/26-070AFEB#19Dead channels #49-50 in plane #2 6ME+3/1/03-026AFEB#23Dead channel #61 in plane #4 7ME+2/1/06-018AFEB#7Dead channel #21 in plane #2 8ME-4/1/15-021AFEB#14Channel 33 in plane 3 showed efficiency 55% 9ME-4/1/12-035AFEB#12Channel #28 in plane 5 showed efficiency 60% 10ME+3/1/12-028AFEB#15Dead channel #27 in plane #6 Test pulse was sent to the test strip of plane #2 2 AFEB were replaced (one needs threshold < 0, second one had large crosstalk ME-1/2/16 – two wire groups in the plane #6 have a short ME-2/1/09 – one AFEB shows unstable behavior (2-9 channels cab be dead) Slice test CSC

Three types of CSC electronics noise observed RMS of SCA pedestals AFEB threshold noise Mostly seen in planes 3, 4, 5 Mostly seen in planes 1, 2, 6 So far seen in planes 1, 3, 5

Proposed aluminum shield

Possible source of CFEB noise Our LV power supplies can be a source of the CFEB noise. LV cable jackets connected to a crate with LV power supplies causes CFEB noise in some chambers. There are 3 types of chambers: Good Acceptable Noisy

CFEB noise of ME+2/2/28 MTCC, DQM results for Global run 2599 CSC commissioning set-up, Sep 08 Our set-up sees less CFEB noise level

Summary of replacements 5 boards had mechanical damages: –LVDB – broken input connector –LVMB – broken switch –ALCT – broken input connector –CFEB – broken latch, input connectors 20 CFEBs were replaced: a. 14 CFEBs – dead channels, low response to the test pulse, no comparators, no data, … b. 6 CFEBs - by mistakes 5 LVMB – read wrong currents 5 ALCT: a.four boards had 1.8 V fuse burnt out b. one board couldn’t been readout 9 cables: a. one DMB-LVDB was damaged b. eight skew clear cables 4 CSCs: a.two chambers couldn’t hold HV > 2.7 kV b.two chambers had unacceptable level of noise

Summary table of known problems DiscInstalledCommissionedProblemsPlane Cross- talk AFEB Cable probl LVBD- LVMB AFEB ch dead, short CFEB Noise YE YE YE YE+1 72 YE YE Must be repaired - Can be fix, but needs board replacement or taking a chamber down - Can be ignored

Boards in Peripheral Crate (PC) MPCMPC DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB CCBCCB CONTROLLERCONTROLLER Data acquisition Motherboard (DMB) VME Crate Controller (VCC) Trigger Motherboard (TMB) and RPC-ALCT Transition module (RAT) Muon Port Card (MPC) Clock & Control Board (CCB) 60 Peripheral Crates for CSC’s in Total.

Lists of new boards and tests 1.Crate Controller CCB MPC DMB TMB RAT PCRB -1 8.MPCB Back plane Timing of ALCT Rx and Tx 2. Timing of CFEB Rx 3. Wire scan 4. Strip comparator scan 5. TMB test 6. DMB test 7. TMB-MPC test 8. TMB-RAT self test FAST site tests (calibration)

Peripheral crate commissioning report 1.There was not comparator data from CFEB #2 of ME+1/2/35 chamber. 2.The low voltage control cable on ME+1/2/36 chambers didn’t work. 3.The ALCT fuse on 1.8 V power line of ME-4/1/11 burnt out. 4.Two CFEB-DMB skew-clear cables were swept.

PC commissioning summary 62 PC have been assembled and tested in ISR before shipping to SX5 for final installation 38 PC have been installed filled up with electronics and cabled 24 PC passed through the first stage of the commissioning The first stage of installed PC commissioning on minus side has started (3 PC have been commissioned).

User Interface  Instructions Traveller Summary Table AFEB Thresholds Test-B Database

Our plans for Commissioning of 36 ME-1/3 chambers which are going to be installed in November-December Fix the problems on as many CSCs as possible before they go down the shaft. 3.Installed most of the Peripheral Crates, fill them up with electronics, and hook up skew clear cables. 4.Finish first stage of Peripheral Crate commissioning before disks are moved down the shaft. 5.Redesign set-up for PC commissioning (add FED crate and TTCVi crate. 6.Develop the software for CSC calibration using PC control and readout. 7.Develop a database for storage the results of the tests. 8.Commissioning new set-up for PC and on-chamber electronics test.

Plans on PC commissioning and integration with CSCs. 2.PC and CSC integration with XDAQ. 3.PC and CSCs integration with cross- DAQ (DQM).

M&O of CSC system Full calibration of CSC and CSC’s electronics. 2.Using particles coming from interaction point make calibration of: I.HV sectors (18 for small CSC and 30 for big ones) II.Time adjustment of ALCT delays for precision BX III.Trigger time adjustment of CSC in PCs IV.ALCT-CLCT trigger time decision for the chambers in PCs 3.M&O of the system: –Control and monitoring CSC performance –CSC repair –Failed board replacement –Participation in data taking runs – shifts on duty