1 Luciano Musa CERN participation to EUDET for TPC electronics CERN, 31 August 2006 Outline Part I – Development of the readout electronics for the LPTPC.

Slides:



Advertisements
Similar presentations
1 500cm 83cm 248cm TPC DETECTOR 88us 1MIP = 4.8 fC = 3 x10 4 e Dynamic : 30 MIP S / N = 30:1 1MIP = 4.8 fC = 3 x10 4 e Dynamic : 30 MIP S / N = 30:1 LATERAL.
Advertisements

Front-end electronics for the LPTPC Outline of the talk:  System lay out  Mechanics for the front-end electronics  End-cap and panels  Connectors and.
The large prototype TPC A status report
Front-end electronics for the LPTPC  Connectors  Cables  Alice readout electronics  New developments  New ideas  Open questions Leif Jönsson Phys.
TPC DETECTOR SEGMENTATION OF THE READOUT PLANE LATERAL VIEW OF THE TPC
Electronics for large LAr TPC’s F. Pietropaolo (ICARUS Collaboration) CRYODET Workshop LNGS, March 2006.
Specific requirements for analog electronics of a high counting rate TRD Vasile Catanescu NIHAM - Bucharest CBM 10th Collaboration Meeting Sept 25 – 28,
A scalable DAQ system using the DRS4 sampling chip H.Friederich 1, G.Davatz 1, U.Hartmann 2, A.Howard 1, H.Meyer 1, D.Murer 1, S.Ritt 2, N.Schlumpf 2 1.
Front-end electronics for Time Projection Chamber I.Konorov Outlook:  TPC requirements  TPC readout options  Options for TPC FE chips  Prototype TPC.
HEP2005, Lisboa July 05 Roberto Campagnolo - CERN 1 HEP2005 International Europhysics Conference on High Energy Physics ( Lisboa-Portugal,
Large Area, High Speed Photo-detectors Readout Jean-Francois Genat + On behalf and with the help of Herve Grabas +, Samuel Meehan +, Eric Oberla +, Fukun.
1 FEE Installation & Commissioning TPC Meeting, 21 April 2006 L. Musa.
Development of novel R/O electronics for LAr detectors Max Hess Controller ADC Data Reduction Ethernet 10/100Mbit Host Detector typical block.
LP TPC DAQ Ulf Mjörnmark Lund University Present understanding and plan.
Calorimeter upgrade meeting – CERN – October 5 th 2010 Analog FE ASIC: first prototype Upgrade of the front end electronics of the LHCb calorimeter E.
14-5 January 2006 Luciano Musa / CERN – PH / ED General Purpose Charge Readout Chip Nikhef, 4-5 January 2006 Outline  Motivations and specifications 
Front-end electronics for the LPTPC  System lay out  End-cap and panels  Mechanics for the front-end electronics  Connectors and cables  Front-end.
Preliminary Design of Calorimeter Electronics Shudi Gu June 2002.
Proposal of new electronics integrated on the flanges for LAr TPC S. Cento, G. Meng CERN June 2014.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
L.Royer– Calice DESY – July 2010 Laurent ROYER, Samuel MANEN, Pascal GAY LPC Clermont-Ferrand R&D LPC Clermont-Fd dedicated to the.
Front-end electronics for the LPTPC  Connectors  Cables  Alice readout electronics  New developments  New ideas  Open questions Leif Jönsson Phys.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
Main Board Status MB2 v1 for FATALIC & QIE 10/06/2015Roméo BONNEFOY - LPC Clermont1 Roméo BONNEFOY François Vazeille LPC Clermont-Ferrand.
ALICE Rad.Tolerant Electronics, 30 Aug 2004Børge Svane Nielsen, NBI1 FMD – Forward Multiplicity Detector ALICE Meeting on Rad. Tolerant Electronics CERN,
SALTRO TPC readout system Presented by Ulf Mjörnmark Lund University 1.
K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 1 Development of fast electronics for the GRAPES-3 experiment at Ooty K.C. RAVINDRAN On Behalf of GRAPES-3 Collaboration.
S.Vereschagin, Yu.Zanevsky, F.Levchanovskiy S.Chernenko, G.Cheremukhina, S.Zaporozhets, A.Averyanov R&D FOR TPC MPD/NICA READOUT ELECTRONICS Varna, 2013.
Progress on STS CSA chip development E. Atkin Department of Electronics, MEPhI A.Voronin SINP, MSU.
Bernardo Mota (CERN PH/ED) 17/05/04ALICE TPC Meeting Progress on the RCU Prototyping Bernardo Mota CERN PH/ED Overview Architecture Trigger and Clock Distribution.
The ALICE Forward Multiplicity Detector Kristján Gulbrandsen Niels Bohr Institute for the ALICE Collaboration.
The Readout Electronics for TPC with GEM readout chamber (and for almost any other readout chamber) Anders Oskarsson Lund Univ. Electronics: Bruxelles,
The AFTER electronics from a user’s point of view D. Attié, P. Colas Mamma meeting,CERN Feb T2K electronics.
Status report on the development of a readout system based on the SALTRO-16 chip Leif Jönsson Lund University LCTPC Collaboration Meeting
17th March 2005Bernardo Mota / CERN - PH TPC FEE Status and Planning CERN, 7th March 2005 Content  Introduction  Status and Milestones  PASA, ALTRO.
1 10 th October 2007Luciano Musa Considerations on readout plane IC Area (die size) 1-2 mm 2 /channel Shaping amplifier 0.2 mm 2 ADC0.6 mm 2 (estimate)
March 9, 2005 HBD CDR Review 1 HBD Electronics Preamp/cable driver on the detector. –Specification –Schematics –Test result Rest of the electronics chain.
TPC electronics for ILD P. Colas Krakow, IFJ-PAN, ILD Pre-meeting September 24, 2013.
1 Luciano Musa, Gerd Trampitsch A General Purpose Charge Readout Chip for TPC Applications Munich, 19 October 2006 Luciano Musa Gerd Trampitsch.
EUDET Annual Meeting 2008, TPC Task K. Dehmelt 1 Status Report TPC Task Klaus Dehmelt DESY EUDET Annual Meeting Oct-2008.
L.Royer– Calice LLR – Feb Laurent Royer, J. Bonnard, S. Manen, P. Gay LPC Clermont-Ferrand R&D pole MicRhAu dedicated to High.
1 Status Report on ADC LPC Clermont-Ferrand Laurent ROYER, Samuel MANEN.
09/02/20121 Delay Chip Prototype & Delay Chip Test Board Joan Mauricio – Xavier Ondoño La Salle (URL) 12/04/2013.
1 Characterization of the PCA16 CERN, 14 th July 2008 M. Mager, L. Musa.
LC Power Distribution & Pulsing Workshop, May 2011 Super-ALTRO Demonstrator Test Results LC Power Distribution & Pulsing Workshop, May nd November.
CHEF 2013 – 22-25th April 2013 – Paris LHCb Calorimeter Upgrade Electronics E. Picatoste (Universitat de Barcelona) On behalf of the LHCb group.
09/10/2010 RD51 Collaboration Meeting Cisbani-Musico-Minutoli / Status JLab Electronics 1 Status of the APV25 electronics for the GEM tracker at JLab Evaristo.
TPC electronics Status, Plans, Needs Marcus Larwill April
Click to edit Master subtitle style Presented By Mythreyi Nethi HINP16C.
1 19 th January 2009 M. Mager - L. Musa Charge Readout Chip Development & System Level Considerations.
M. TWEPP071 MAPS read-out electronics for Vertex Detectors (ILC) A low power and low signal 4 bit 50 MS/s double sampling pipelined ADC M.
VMM Update Front End ASIC for the ATLAS Muon Upgrade V. Polychronakos BNL RD51 - V. Polychronakos, BNL10/15/131.
Readout Control Unit of the Time Projection Chamber in ALICE Presented by Jørgen Lien, Høgskolen i Bergen / Universitetet i Bergen / CERN Authors: Håvard.
CERN PH MIC group P. Jarron 07 November 06 GIGATRACKER Meeting Gigatracker Front end based on ultra fast NINO circuit P. Jarron, G. Anelli, F. Anghinolfi,
Readout controller Block Diagram S. Hansen - CD-1 Lehman Review1 VXO Ø Det Links to 24 SiPM Front End Boards Clock Event Data USB ARM uC A D Rd Wrt 100Mbit.
The ALICE TPC Readout Control Unit 10th Workshop on Electronics for LHC and future Experiments 13 – 17 September 2004, BOSTON, USA Carmen González Gutierrez.
Overview of TPC Front-end electronics I.Konorov Outline:  TPC prototype development  Readout scheme of the final TPC detector and further developments.
KLOE II Inner Tracker FEE
FEE for TPC MPD__NICA JINR
ALICE INDUSTRIAL AWARD for its collaboration to the ALTRO Chip
Journées VLSI-FPGA-PCB Juin 2010 Xiaochao Fang
A General Purpose Charge Readout Chip for TPC Applications
Analog FE circuitry simulation
Functional diagram of the ASD
KRB proposal (Read Board of Kyiv group)
DCH FEE 28 chs DCH prototype FEE &
Børge Svane Nielsen/JJG
A Readout Electronics System for GEM Detectors
MPGD Detectors and Electronics at CIAE
Front-end electronic system for large area photomultipliers readout
Presentation transcript:

1 Luciano Musa CERN participation to EUDET for TPC electronics CERN, 31 August 2006 Outline Part I – Development of the readout electronics for the LPTPC Part II – R&D on the readout electronics for the LC TPC

2 Luciano Musa PART I Development of the readout electronics for the LPTPC

3 Luciano Musa General requirements and strategy (1/2) Readout electronics for the Large Prototype TPC (LPTPC) modular with well defined interface for various amplifcation technologies (GEM & µMegas) different module geometries easy to use and modern DAQ system integrated pre-amps and digitization on TPC end flange should be first step towards ILC TPC electronics Two strategies pursued in EUDET new TDC (Rostock) ALTRO-based (Lund, CERN) Joachim Mnich ( ) Joachim Mnich ( )

4 Luciano Musa 19 cm 17 cm ALICE TPC Front End Card Integrated charge amplification, digitization and signal preprocessing in the TPC end plate 128 channels

5 Luciano Musa 25 Front End Cards Readout and Control Backplane Readout & Control Backplane Readout Bus (BW = 200 MB /sec) VME-like protocol + syncrhonous block transfer Control Bus (BW = 3 Mbit / sec) I2C interface + interrupt feature point-to-point lines for remote power control of FECs

6 Luciano Musa Power Regulators ALICE TPC RCU (requires DDL + PCI RORC) Readout Control Unit 3/3 DCS CARD SIU CARD Detector Data Link Ethernet interface TTC Interface

7 Luciano Musa USB to FEC Interface Card (U2F) The U2F Card can read up to 16 FECs (2048 channels) U2F Card  U2F is functionally identical (readout and monitoring) to the RCU  ALICE Detector Data Link (DDL) and DCS Ethernet link replaced by USB link

8 Luciano Musa SPI Card + ALICE TPC FEC Reading GEM and MICROMEGAS with the ALICE TPC FEC Signal Polarity Inverter (SPI) Card

9 Luciano Musa An example: HARP FC + GEM R/O + SPI + FEC + U2F CERN – PS, November 2005

10 Luciano Musa In the EUDET Collaboration Meeting at Nikhef (Jan 06), it was decided For the LPTPC only the ALTRO based solution will be pursued 1000 or 2000 channels according to the availability of ALTRO chips system components and responsabilities interface between TPC readout plane and FEE (Lund) new shaping amplifer chip (CERN) 40-MHz ALTRO (CERN) Front End Card (PASA + ALTRO): new design (based on CERN ALICE FEC) (Lund) production and test (Lund) U2F card (CERN) System integration and test (Lund) DAQ (Lund) General requirements and strategy (2/2)

11 Luciano Musa  Participation to the definition of the interface between readout plane and FEE: several options are being studied and worked out in detail (small CERN contr.) New shaping amplifier chip: well advanced (see second part of this present.) 40-MHz ALTRO chip: about 150 chips have to be unsoldered from exsisting FECs (obsolete ALICE prototypes). This work is planned for Q U2F card (CERN): 4 new boards have been produced and tested SPI cards: 2 new boards have been produced and tested 2 complete readout system (SPI + FEC + U2F + Labview Software) have been prepared and transferred to Lund (April) and Aachen (June) Status of CERN contribution

12 Luciano Musa PART II R&D on readout electronics for the LC TPC General Purpose Charge Readout Chip

13 Luciano Musa A general purpose charge readout chip number of channels: 32 or 64 programmable charge amplifier: sensitive to a charge in the range: ~ ~10 7 electrons Input capacitance: 0.1pF to 10pF high-speed high-resolution A/D converter: sampling rate in the range 40MHz - 160MHz; programmable digital filter for noise reduction and signal interpolation; a signal processor for the extraction and compression of the signal information (charge and time of occurrence). Motivations & Specifications 2/2

14 Luciano Musa Charge Readout Chip Block Diagram 32 / 64 Channel Charge Amplifier Anti- Aliasing Filter ADC Signal Processor Data Compression Multi-Acq Memory Hit Finder Feature Extaction Histogrammer Charge Amplifier Anti- Aliasing Filter ADC Signal Processor Data Compression Multi-Acq Memory Charge Amplifier Anti- Aliasing Filter ADC Signal Processor Data Compression Multi-Acq Memory INTERFACEINTERFACE Maximize S/N reduce quantization error reduce signal bandwidth Correct for crosstalk and common mode noise Optimum pulse shaping for extraction of pulse features

15 Luciano Musa Milestone I (Q1 2007) ⇒ Programmable Charge Amplifier (prototype) –16 channel charge amplifier + anti-aliasing filter Milestone II (Q2 2007) ⇒ 10-bit multi-rate ADC (prototype) –4-channel 10-bit 40-MHz ADC. The circuit can be operated as a 4-channel 40- MHz ADC or single-channel 160-MHz ADC Milestone III (Q2 2008) ⇒ Charge Readout Chip (prototype) –This circuit incorporates 32 (or 64) channels. Milestone IV (Q2 2009) ⇒ Charge Readout Chip (final version) Project Milestones

16 Luciano Musa Programmable Charge Amplifier  12- channel 4th order CSA  various architectures (classical folded cascode, novel rail-to-rail amplifier)  process: IBM CMOS 0.13  m  area: 3 mm 2  1.5 V single supply  Package: CQFP 144  MPR samples (40): Apr ‘06 Production Engineering Data ParameterRequirementSimulationMPR Samples Noise< 500e300e (10pF)270e (10pF) Conversion gain10mV / fC 9.5mV / fC Peaking time (standard)100ns Non linearity< 1%< 0.35%0.4% Crosstalk<0.3%0.4%< 0.3% Gain dispersion> Power consumption< 20mW10mW / ch10mW / ch (30pF cl) OUTPUTS INPUTS single channel 7 standard channels5 versions Gerd Trampitsch

17 Luciano Musa Programmable Charge Amplifier  The CQFP 144 package has the same pin- count and similar pinout as the ALICE TPC PASA  In the near future the new chip will be tested on a ALICE TPC FEC Next Step Milestone I (Q4 2006) ⇒ Programmable Charge Amplifier (prototype) –16 channel charge amplifier + anti-aliasing filter –Programmable peaking time (50ns – 500ns) and gain –Submission (?? To be discussed with Sandro)

18 Luciano Musa Phase DetectorCharge Pump Voltage Controlled Delay Line up down Vctrl Ref. Clock (40 MHz) C B A D A/D Multi-Channel Time-Interleaved A/D Converter A B A C A C D Upgrade of ALTRO ADC 4-Channel 40-MHZ ADC A B C D 2-Channel 80-MHZ ADC C A A C 1-Channel 160-MHZ ADC A A A A aa bb cc dd CLK aa bb cc dd aa bb cc dd