Clockless Logic System-Level Specification and Synthesis Ack: Tiberiu Chelcea.

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Clockless Logic System-Level Specification and Synthesis Ack: Tiberiu Chelcea

CMU #2 Communication protocol: 4-phase handshake  O1 initiates communication  O2 completes communication Communication channel: req: operation start ack: operation done Asynchronous Communication Protocols: Control O1O2 Areqack Active phase Return-to-zero (RTZ) phase passive port active port

CMU #3 Asynchronous Communication Protocols: Data Channel parameters: Data Encoding: bundled-data Data Encoding: bundled-data  Communication channel: 2 control wires + bundle of data wires Data Flow Direction: Data Flow Direction:  Push channel: data flows with the request  Pull channel: data flows with the acknowledge Data Validity: broad, early, late Data Validity: broad, early, late  Broad: data valid for the entire handshake  Early: data valid during active phase of handshake  Late: data valid during return-to-zero phase of handshake Data Item Type: byte, word, bool … Data Item Type: byte, word, bool … Data Width: # data wires to encode data item Data Width: # data wires to encode data item … The CH language needs to model all these parameters O1O2 A

CMU #4 Interleaving of Two Communication Protocols Interleaving = combining behaviors on 2+ channels Example #1: Example #1: handshake on B enclosed within handshake on A Example #2: Example #2: handshake on B sequenced after handshake on A Different interleavings: provide different tradeoffs  Speed: latency/throughput  Area  Power … The CH language needs to model various interleavings O1Obj A B

CMU #5 Balsa Language: High-Level Modeling High-level asynchonous description language High-level asynchonous description language Based on CSP Based on CSP Block-structured, algorithmic Block-structured, algorithmic Each Balsa module communicates through handshaking with the environment Each Balsa module communicates through handshaking with the environment Simple Example: One place Buffer procedure Buf1 (input i: byte; output o: byte) is local variable x : byte begin loop begin i -> x; o <- x end

CMU #6 Handshake Circuits: Intermediate Representation Intermediate representation of Balsa/Tangram compilation Intermediate representation of Balsa/Tangram compilation Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake component = primitive asynchronous component communicating only through handshaking Handshake component = primitive asynchronous component communicating only through handshaking X ; # Start I O procedure Buf1 ( input i: byte; output o: byte) is local variable x : byte begin loop begin i -> x; o <- x end Balsa HDLHandshake Circuit syntax-directed translation unoptimized

CMU #7 Handshake Circuits Intermediate representation of Balsa/Tangram compilation Intermediate representation of Balsa/Tangram compilation Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake component = primitive asynchronous component communicating only through handshaking Handshake component = primitive asynchronous component communicating only through handshaking loop begin end i x o <- x ; X ; # Start I O ->

CMU #8 Handshake Circuits Intermediate representation of Balsa/Tangram compilation Intermediate representation of Balsa/Tangram compilation Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake component = primitive asynchronous component communicating only through handshaking Handshake component = primitive asynchronous component communicating only through handshaking loop begin end i x o <- x ; X ; # Start I O -> X

CMU #9 Handshake Circuits Intermediate representation of Balsa/Tangram compilation Intermediate representation of Balsa/Tangram compilation Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake circuit = netlist of handshake components, connected by channels, corresponding to a Balsa program Handshake component = primitive asynchronous component communicating only through handshaking Handshake component = primitive asynchronous component communicating only through handshaking loop begin end i x o <- x ; X ; # Start I O ->

CMU #10 Large-Scale Asynchronous Systems: Overview small microprocessor core