微處理機 Microprocessor (100上) ARM 內核嵌入式SOC原理

Slides:



Advertisements
Similar presentations
ARM Cortex A8 Pipeline EE126 Wei Wang. Cortex A8 is a processor core designed by ARM Holdings. Application: Apple A4, Samsung Exynos What’s the.
Advertisements

Multiplication and Division
Datorteknik ArithmeticCircuits bild 1 Computer arithmetic Somet things you should know about digital arithmetic: Principles Architecture Design.
Datorteknik IntegerMulDiv bild 1 MIPS mul/div instructions Multiply: mult $2,$3Hi, Lo = $2 x $3;64-bit signed product Multiply unsigned: multu$2,$3Hi,
ARM Organization and Implementation Aleksandar Milenkovic Web:
1 ALUs. 2 Topics: ALU Overview - core of the integer datapath - 2 operands, 32-bits wide, plus control signals Exercise: A simple multiplier.
361 div.1 Computer Architecture ECE 361 Lecture 7: ALU Design : Division.
Instruction Level Parallelism (ILP) Colin Stevens.
Contemporary Logic Design Arithmetic Circuits © R.H. Katz Lecture #24: Arithmetic Circuits -1 Arithmetic Circuits (Part II) Randy H. Katz University of.
Computer ArchitectureFall 2008 © August 25, CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (1)
1 Lecture 4: Arithmetic for Computers (Part 4) CS 447 Jason Bakos.
Lecture 12: Computer Arithmetic Today’s topic –Numerical representations –Addition / Subtraction –Multiplication / Division 1.
CS1Q Computer Systems Lecture 9 Simon Gay. Lecture 9CS1Q Computer Systems - Simon Gay2 Addition We want to be able to do arithmetic on computers and therefore.
Copyright 1995 by Coherence LTD., all rights reserved (Revised: Oct 97 by Rafi Lohev, Oct 99 by Yair Wiseman, Sep 04 Oren Kapah) IBM י ב מ 10-1 The ALU.
Lec 13Systems Architecture1 Systems Architecture Lecture 13: Integer Multiplication and Division Jeremy R. Johnson Anatole D. Ruslanov William M. Mongan.
07/19/2005 Arithmetic / Logic Unit – ALU Design Presentation F CSE : Introduction to Computer Architecture Slides by Gojko Babić.
Lecture 6: Multiply, Shift, and Divide
1/8/ L3 Data Path DesignCopyright Joanne DeGroat, ECE, OSU1 ALUs and Data Paths Subtitle: How to design the data path of a processor.
05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir1 Computer Arithmetic Computer Engineering Department.
Lecture 18: Hardware for Arithmetic Today’s topic –Intro to Boolean functions (Continued) –Designing an ALU 1.
IT253: Computer Organization
Csci 136 Computer Architecture II – Multiplication and Division
Number Systems and Circuits for Addition – Binary Adders Lecture 6 Section 1.5 Fri, Jan 26, 2007.
CDA 3101 Spring 2016 Introduction to Computer Organization
Cpu control.1 2/14 Datapath Components for Lab The Processor! ( th ed)
UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS.
Arithmetic Intro Computer Organization 1 Computer Science Dept Va Tech February 2008 © McQuain Multiplication Design 1.0 Multiplicand Shift left.
By Wannarat Computer System Design Lecture 3 Wannarat Suntiamorntut.
ARM Shifts, Multiplies & Divide??. MVN Pseudo Instructions Pseudo Intruction: Supported by assembler, not be hardware.
1 The ALU l ALU includes combinational logic. –Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay.
1 Lecture 5Multiplication and Division ECE 0142 Computer Organization.
ARM organization.
Computer System Design Lecture 3
More Binary Arithmetic - Multiplication
CDA3101 Recitation Section 5
EKT 221 : DIGITAL 2.
Implementing Combinational
Combinational Circuits
Somet things you should know about digital arithmetic:
Array multiplier TU/e Processor Design 5Z032.
Multiplication
Computer Architecture & Operations I
MIPS mul/div instructions
Part II : Lecture III By Wannarat.
Swamynathan.S.M AP/ECE/SNSCT
Morgan Kaufmann Publishers
Knowing your math operation terms
Multiplication
CDA 3101 Summer 2007 Introduction to Computer Organization
Partial Products Algorithm for Multiplication
CDA 3101 Spring 2016 Introduction to Computer Organization
King Fahd University of Petroleum and Minerals
Integers in 2’s compliment Floating point
Topic 3c Integer Multiply and Divide
Lecture 5 Multiplication and Division
CDA 3101 Summer 2007 Introduction to Computer Organization
ECE/CS 552: Integer Multipliers
Computer Organization and Design
MICROPROCESSORS Dr. Hugh Blanton ENTC 4337.
Computer Arithmetic Multiplication, Floating Point
Lecture 11: Hardware for Arithmetic
ARM implementation the design is divided into a data path section that is described in register transfer level (RTL) notation control section that is viewed.
A.R. Hurson 323 CS Building, Missouri S&T
Multiplication by small constants (pp. 139 – 140)
Simple Implementation
The ARM Instruction Set
Combinational Circuits
ARM ORGANISATION.
Multiply Instructions
1 Lecture 5Multiplication and Division ECE 0142 Computer Organization.
Presentation transcript:

微處理機 Microprocessor (100上) ARM 內核嵌入式SOC原理 Multiplier design 2011/10/27

One bit Multiplier for ARM1 Since the 32-bit addition time has a significant effect on the datapath cycle time Maximum clock rate and the processor's performance

One bit Multiplier A B Cin Sum Cout 1

B A = 1 0 0 1 * 1 1 0 1 3 2 1 0 N TURN N=0: MUL=1 A = A + (B LSL 0) Multiplier Shift (B) ALU LSL #N A = A + 0 1 A = A + (B LSL #N)

Multiplier design All ARM processors apart from the first prototype have included hardware support for integer multiplication. Two styles of multiplier have been used Older ARM cores include low-cost multiplication hardware that supports only the 32-bit result multiply and multiply-accumulate instructions Recent ARM cores have high-performance multiplication hardware and support the 64-bit result multiply and multiply-accumulate instructions

Booth algorithm Two bit multiplier This allows all four values of the 2-bit multiplier to be implemented by a simple shift and add or subtract x 3 =[ x (-1) + x 4 ] carrying the x 4 over to the next cycle

modified Booth's algorithm Cin Multiplier Shift (B) ALU Cout 00 LSL #2N A = A + 0 01 A = A + (B LSL #2N) 10 LSL #(2N+1) A = A - (B LSL #(2N+1)) 1 11 A = A - (B LSL #2N) A = A + (B LSL #(2N+1)) A = A – (B LSL #2N)

B A = 10 11 00 01 * 11 01 00 11 3 2 1 0 N TURN N=0: Cin = 0 MUL=11 A = A - (B LSL 0) set Cout = 1 A = 0 + 1111111101001111 N=1: Cin = 1 MUL=00 A = A + (B LSL 2) set Cout = 0 A = 1111111101001111 + 0000001011000100 = 0000001000010011 N=2: Cin = 0 MUL=01 A = A + (B LSL 4) set Cout = 0 A = 1000010011 + 101100010000 = 0000110100100011 N=3: Cin = 0 MUL=11 A = A - (B LSL6) set Cout = 1 A = 110100100011 + 1101001111000000 = 1110000011100011 N=4: Cin = 1 MUL=00 A = A + (B LSL 8) set Cout = 0 A = 1110000011100011 + 1011000100000000 = 1001000111100011 Cin Multiplier Shift (B) ALU Cout 00 LSL #2N A = A + 0 01 A = A + (B LSL #2N) 10 LSL #(2N+1) A = A - (B LSL #(2N+1)) 1 11 A = A - (B LSL #2N) A = A + (B LSL #(2N+1)) A = A – (B LSL #2N)

實習問題 實習一: 使用One bit Multiplier將 10 11 00 01 * 11 01 00 11 的二進制乘法用組合語言寫出。 實習二: 使用Booth‘s algorithm將 10 11 00 01 * 11 01 00 11 的二進制乘法用組合語言寫出。 做完請找助教檢查