Programmable Logic Design Solutions

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Presentation transcript:

Programmable Logic Design Solutions Thank you for taking the time to learn about Xilinx’s Foundation Series software solutions. Xilinx Foundation Series is the only complete, Ready-to-Use software solution available for Xilinx programmable logic devices. This ready-to-use solution provides a complete front-to-back toolset, incorporating design entry, synthesis, simulation, timing analysis, and device implementation software in a complete integrated environment. Xilinx also provides world-class technical training and support to help ensure your design success. With Xilinx and our Foundation Series software, you get everything you need to design with the industry’s highest density, highest performance FPGA and CPLD devices. Ready to Use Programmable Logic Design Solutions

Foundation Series Xilinx’ Ready-to-Use solution World-class EDA Technology, Integrated Into a Unified Design Environment Value-driven Configurations Which Meet Your Design Methodology and Density Needs. High-volume, Full Featured Programmable Logic Devices. World Class Field and Factory Support.

Foundation Series Xilinx’ Ready-to-Use solution World-class EDA Technology, Integrated Into a Unified Design Environment Mixed-level Design Push-Button Flows Superior HDL Solution

World-Class EDA Technology Aldec Design Entry tools Optional RTL Simulation * Aldec Gate-Level Simulator Synopsys Synthesis Xilinx Implementation tools (including A.K.A. Speed Technology) K-Paths Enhanced Static Timing Analyzer * VHDL and Verilog Simulation tools from Aldec and MTI sold separately. Ask for details

Unified Design Environment Standard Windows Pull-down Menus Standard Windows Tool Bar Foundation Flow Engine Window with Content, and Report tab Flow Button Design File Management Window with File, and Version tabs Status Indicator Console Window with Error, Warning, and Messages tabs

Push-Button, Programmable Logic Design Solution Design Entry Supporting Your Design Methodology Mixed-level Design Mixed-language Design Robust and Versatile Analysis Gate-level Simulation HDL Simulation Static Timing Analysis Xilinx Implementation Tools Great Results by Default Performance Driven When You Need It Simulation Synthesis Implementation Foundation Series

Push-Button Performance Enter your design using your preferred method of either schematic, hdl, or state machine Optional RTL HDL Source-code debugging FPGA ExpressTM world class synthesis for all designs which include HDL Versatile check-point verification capabilities accelerate design process. Xilinx’ Implementation tools quickly deliver high QOR through Xilinx A.K.A. Speed Technology “Pull automation” identifies dependencies and runs both synthesis and implementation tools Device programming at the push of a button

Push-Button Synthesis or Foundation “Pull Automation” runs both Synthesis and Implementation tools after the push of a single button and completion of the synthesis / implementation dialog. X X HDL constraint entry / and Time Tracker TM GUIs* illustrate estimates of your design’s critical paths using an intuitive spreadsheet format. * Note - Available in Express configuration only

Push-Button Constraint Entry Xilinx Constraints Editor Global Dialog* Global (Clock) Constraint Definition Tabs for Global, Port and Advanced Constraints User Constraints File display * The Xilinx Constraints Editor is used in Foundation Series Base, Base-Express and Standard product configurations.

Push-Button Constraint Entry Xilinx Constraints Editor Ports Dialog Port Name and Direction listed by XCE for designer Valid list of I/O locations, Timing Constraints and Slew Rate options listed by XCE for designer

Your Design Methodology Mixed-Level Design HDL Design becomes as easy as schematic entry with drop in blocks of HDL. HDL Editor directly associated with new schematic object Design Wizard automates the process of adding an HDL Symbol into a Schematic

Your Design Methodology Mixed Language Design Seamless Integration of VHDL and Verilog Supported in Both Synthesis and Simulation Enables High-density Design Flows to Utilize IP / Cores Enables High-volume Design Flows to Reuse Designs in Order to Meet Short Time-to-market Demands of Standards Based Design Xilinx CORE Generator (included) Xilinx designed and delivered, cost effective solutions (i.e. PCI) Alliance-Core Program delivers a wide variety of 3rd party cores.

Robust and Versatile Verification Gate-Level Simulation Supports Designs Densities Beyond 50 K Gates Cross-highlighting Supports for Schematic Flows Support for Simulation of Gate-level Netlist From Synthesized HDL Provides Both Graphical and Command File Stimulus Capabilities Simulation Script Wizard and Integrated Editor Simplify Command File Generation

Robust and Versatile Verification HDL Simulation Enables RTL Source Code Debugging Supports Test-bench Methodologies Enables Back-Annotated Timing Simulation using HDL Supports Push-Button Integration into Foundation PCM Active-VHDL only

Robust and Versatile Verification Static Timing Analysis Front End Performance Estimates (FPGA Express Time Tracker TM GUI Detailed Physical Path Timing Analysis (Post-layout) Accelerates Qualification of Design Layout After Functional Verification Available Through an Interactive GUI or in a Variety of Text Report Files. Evaluates QOR Based on Design Requirements Specified by User. Supports Min Delays and Timing Pro-rating for Improved Operating Conditions

Xilinx Best-in-Class Implementation Tools Seamlessly Integrated Into the Foundation Project Manager Xilinx Flow Engine Simplifies Access to Xilinx A.K.A. Speed Technology Enables Great Results Automatically Performance Driven Capabilities When Needed

Superior HDL Solution: Design Creation VHDL & Verilog HDL Design Capabilities Including: Graphical State Diagram Editor Powerful HDL Editor With Integrated Language Assistant Logiblox and CORE Generator Instantiations VHDL Language Tutorial From Esperan. Language Assistant Graphical State Editor

Superior HDL Solution: Synthesis Mixed VHDL & Verilog HDL Synthesis and Optimization Robust FPGA Express Compiler Includes Support for VHDL ‘93 Time Trackertm Performance Estimator Graphical Constraint Entry / Analysis

Superior HDL Solution: Simulation Support for VHDL And/or Verilog HDL RTL Source Code Debugging Supports Testbench Methodologies Fully Qualified Design Flows 30 Day Evaluation Products Included With Each Foundation Series HDL Product Shipped Licensing and Support Provided by Simulator Vendors. Permanent licenses sold separately by partners. Visit www.aldec.com and www.model.com for info. on current product offerings.

Xilinx Foundation Series HDL Solutions Productivity Edge Only Xilinx Delivers These Essential Capabilities 4 Design Wizards Graphical VHDL and Verilog Entry Synopsys Synthesis Performance Driven Design (A.K.A. Speed technology) Best Programmable Logic Performance/Density/Power VHDL / Verilog Simulation (Free Evaluation software in the box) Mixed-Level, Mixed-Language Design Best Timing Driven Compile Time 4 4 4 4 4 4 4

Foundation Series Xilinx’ Ready-to-Use solution World-Class EDA Technology, integrated into a Unified Design Environment Value-driven configurations which meet your design methodology and density needs. High-Volume, full featured Programmable Logic Devices. World Class Field and Factory Support.

Xilinx Foundation Series Value-Driven configurations $95 $495 $3995 $4995! X $7995 The low cost of Foundation Series design tools, complete software integration out of the box, and Xilinx’s unsurpassed commitment to quality and technical support combine to deliver a design solution with unequaled value. Foundation Series software solutions are available in four simple, low-cost configurations. Simply determine the device families (Spartan / XC9500 / XC4000E/X < 10K gates, or XC4000X > 10K gates) and the design methodology you will be using (schematic or HDL). Foundation Series configurations provide all the design tools, software integration, and documentation necessary to quickly design with Xilinx’s leading programmable logic devices. After you’ve licensed a Foundation Series product configuration, it’s easy to upgrade your system to provide HDL design capabilities and/or high density device support. Upgrade pricing is set at the difference between your product configuration and list price of the new configuration. Simply call your Xilinx sales representative for immediate action. For a limited time, the Foundation Series BAS is available at an incredible promotional price. For $95, you can license a complete Foundation Series design solution and complete a Xilinx CPLD or FPGA design. NOTE: Promotional Pricing Good Through 12/30/98

Foundation Series Xilinx’ Ready-to-Use solution World-class EDA Technology, Integrated Into a Unified Design Environment Value-driven Configurations Which Meet Your Design Methodology and Density Needs. High-volume, Full Featured Programmable Logic Devices. World Class Field and Factory Support.

Complete High Volume Solution Spartan / Spartan XL Fpgas No Compromises Architecture Performance, RAM, Cores, and Low Price XC9500 / 9500XL Cplds Most Flexible JTAG ISP Devices Fastest Speed, Best Pin-locking, and Low Price Xilinx delivers an optimum solution for high volume programmable logic applications. Advanced CPLD (XC9500) and FPGA (Spartan) families deliver performance and critical logic features at low volume prices. The Foundation Base-Express configuration delivers everything needed to quickly and easily complete high volume designs, featuring HDL design and advanced push-button synthesis from Synopsys. The low price of Foundation Series software makes it easy to access advanced design software technology and adopt programmable logic.

Foundation Series Xilinx’ Ready-to-Use solution World-class EDA Technology, Integrated Into a Unified Design Environment Value-driven Configurations Which Meet Your Design Methodology and Density Needs. High-volume, Full Featured Programmable Logic Devices. World Class Field and Factory Support.

Foundation Series World Class Support Expert Field Applications Engineers Certified Distribution Field Applications Engineers Rapid-response Xilinx Hot-line Support “Known-issues” and Solutions Database Available From On-line Documentation and From the Xilinx Support Web Site. Comprehensive Customer Education Program: Hard Copy Manuals, Including Tutorials On-line Documentation / Reference Manuals On-line Help With Comprehensive Index Local and Factory Based Customer Training Courses Web-enabled Design Features

Foundation Series Web-enabled Design Tools Integrated into Project Manager Instant Access to http://support.xilinx.com Netscape and MS Explorer compatible News Bulletins Searchable Knowledge Base (includes agent reports) Completely compatible with the browser of your choice release 1.5i is the first stage in making this environment interactive. Integrated into the Project Manager of our Foundation Series and the Design Manager of the Alliance Series is a feature that enables instant access to a designer centric landing zone on the web support.xilinx.com, our design centric web pages. Simply by selecting this menu item designers are easily and immediately in touch with application notes, the databook, IP and more. Designer Tools & Services