Analog-Digital Conversion

Other types of ADC Dual Slope ADCs use a capacitor that is connected to a reference voltage. the capacitor voltage starts at zero and is charged for a set time by the output voltage of a sample-and-hold circuit. the capacitor is then switched to a known negative voltage reference, and charged in the opposite direction until it reaches zero volts again. this second charge is timed with a digital counter. The final count is proportional to the input voltage. Advantages: This technique is very precise and can produce ADCs with high resolution Disadvantages: very slow and generally more expensive than successive approximation ADCs.

Output from sample and hold circuit The counter continues to count until is reaches a pre-determined value. Output from sample and hold circuit When an analog value is applied, the capacitor begins to charge in a linear manner and the control logic passes to the counter VO1 1 Control Logic, (AND Gate) Register Once the value is reached, the count stops and the counter is reset. The control logic switches the input to the first comparator to –Vref, providing a discharge path for the capacitor. As the capacitor discharges the counter counts and VO1 reaches zero, the comparator o/p goes to zero, the count stops and the value is stored in the register

t t1 -VO1 Fixed time, variable slope during charging Variable time, fixed slope during discharging DUAL SLOPE

The resolution of a n-bit analog-to-digital Converter (ADC) is a function of how many parts the maximum signal can be divided into. The formula to calculate resolution is 2n. For example, a 12 bit ADC has a resolution of 212 = 4,096

Analog-Digital Conversion

Digital Signal Conditioning In many DSP applications, we must reconstruct an analog signal after the digital processing stage. This is done using a digital-to-analog converter (DAC), which is considerably less expensive than the ADC. DAC Digital Value Analog Voltage Reference Voltage

Voltage Source Multiplying DAC or Binary Weighted Input DAC Types of DAC Voltage Source Multiplying DAC or Binary Weighted Input DAC This method use a reference voltage which is switched in or out by the digital data. Starting with the LSB, each resistor at the next higher input is 1/2 the resistance of the previous value. The converter is so-named because it multiplies a certain gain value with a source voltage (Vcc or sometime referred to as the reference voltage)

Let’s consider a 2 bit example 𝑅 MSB LSB Digital Analog 00 0 V 01 10 11 - 0.5Vcc - Vcc - 1.5Vcc The output voltage is calculated as summing amplifier

EXAMPLE Take VR = 10 V Calculate the value of Vout for the digital input of 1001 if R = 10 kΩ and Rf = 5 kΩ Vout = - 5.625 V VR = 10 V

R/2R DAC A disadvantage of the former DAC design was its requirement of several different precise input resistor values: one unique value per binary input bit. Manufacture may be simplified if there are fewer different resistor values to purchase, stock, and sort prior to assembly. By constructing a different kind of resistor network on the input of our summing circuit, we can achieve the same kind of binary weighting with only two kinds of resistor values, and with only a modest increase in resistor count. This “ladder” network looks like this: 3 bit R/2R DAC

Iin I2 I1 I0 In order to calculate Iin, must calculate Req3 ITOTAL 𝐼𝑇𝑂𝑇𝐴𝐿= 0−𝑉𝑂 𝑅𝑓

Req3 = R Iin = Vref / Req3 = Vref / R I2 = Vref / 2R I1 = Vref / 4R For a 3-bit DAC Req3 = R Iin = Vref / Req3 = Vref / R I2 = Vref / 2R I1 = Vref / 4R I0 = Vref / 8R

Iin = Vref / Req3 = Vref / R = 5/15 = 0.333 mA R= 15 kΩ 2R = 30 kΩ RF = 15 kΩ Req3 = R = 15 kΩ Iin = Vref / Req3 = Vref / R = 5/15 = 0.333 mA I2 = Vref / 2R = 5 / 30 = 0.1667 mA I1 = Vref / 4R = 5 / 60 = 0.0833 mA I0 = Vref / 8R = 5 / 120 = 0.04167 mA IT = 0.25 mA Vo = - IT x Rf = -3.75 V

Iin = Vref / Req4 = Vref / R = 10/2 = 5 mA B3 B2 B1 B0 Example: 4 bits R/2R DAC 1 1 Input = (0101)2 VREF = 10 V R = 2 kΩ Rf = 4 kΩ I3 I2 I1 I0 Req4 = R = 2 kΩ Iin = Vref / Req4 = Vref / R = 10/2 = 5 mA I3 = Vref / 2R = 10 / 4 = 2.5 mA I2 = Vref / 4R = 10 / 8 = 1.25 mA I1 = Vref / 8R = 10 / 16 = 0.625 mA I0 = Vref / 16R = 10 / 32 = 0.3125 mA IT =1.5625 mA Vo = - IT x Rf = - 6.25 V

R-2R versus Binary Weighted Advantages Only two resistor values, R and 2R Does not require high precision resistors like the binary weighted DAC Disadvantage Lower conversion speed as compared to Binary Weighted DAC

Smoothing out the output of DAC The output of a DAC is stepped, just like the analog waveforms that were sampled and held. The stepped or staircase effect is a distortion, and it may be desirable to reduce this effect. Hence, at the end a low pass smoothing filter is used. This filter is referred to as a reconstruction filter.

Performance Specifications Resolution Settling Time Linearity An example of a reconstruction filter is the Sallen-Key filter circuit configuration 𝑓𝑐= 1 2𝜋 𝑅1𝐶1𝑅2𝐶2 Performance Specifications Resolution Settling Time Linearity

Approximate output Approximate output RESOLUTION Poor Resolution(1 bit) Better Resolution(3 bit) Vout Desired Analog signal Approximate output 2 V Levels Digital Input 1 Digital Input Vout Desired Analog signal Approximate output 8 V Levels 000 001 010 011 100 101 110 111

SETTLING TIME Settling Time: The time required for the input signal voltage to settle to the expected output voltage(within +/- VLSB). Any change in the input state will not be reflected in the output state immediately. There is a time lag, between the two events.

LINEARITY Linearity: is the difference between the desired analog output and the actual output over the full range of expected values. Ideally, a DAC should produce a linear relationship between a digital input and the analog output, this is not always the case.

Linearity(Ideal Case) Digital Input Perfect Agreement Desired/Approximate Output Analog Output Voltage NON-Linearity(Real World) Analog Output Voltage Digital Input Desired Output Miss-alignment Approximate output