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Published byKristopher McDonald Modified over 6 years ago

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1 Dr. Un-ki Yang Particle Physics Group ukyang@hep.manchester.ac.uk or Shuster 5.15 Amplifiers and Feedback: 3

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2 Web page for Amp & Feedback

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3 Realistic OP Amplifier: review Gain is NOT infinite Gain is NOT constant against frequency Output response is NOT instantaneous Output impedance is NOT zero Input impedance is NOT infinite Gain drops at high frequency Bandwidth: a stable range. -3dB Slew rate: response rate

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4 Positive Feedback: review Negative feedback: stabilizes the circuit Positive feedback: saturated output, (+/- 15 V) thus used for digital electronics.

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5 Schmitt Trigger: review Two different thresholds V +, d epending on Vout: fix a problem f or noisy signal

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6 toto t2t2 t1t1 Schmitt Trigger Noisy problem is fixed tV+V+ t< t o V(H) t >t o V(L) t >t 1 V(H) t >t 2 V(L) threshold V +

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7 Analogue to Digital conversion (ADC) Why digitized signal? Analogue signals can be distorted and attenuated Practically impossible to analyze many analogue channels

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8 Analogue to Digital conversion (ADC) Fast conversion (sampling rate) High accuracy (resolution) Linearity

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9 ADC Sampling rate: how often do we need to digitize analogue signal? good to have a high sampling rate but requires fast processing Nyquist rate = use 2 x highest frequency of the signal Resolution: digitization introduces uncertainty due to a finite step size. Good resolution: large number of ADC bits: 2 n, but requires fast processing and many chips Resolution: LSB/2

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10 Comparator 1 bit ADC: to provide a digital output indicating which of two analog input voltage is larger: the simplest ADC Properties: very fast (1 clock cycle), very cheap but very poor resolution (~30%) Vout=G 0 (V + - V - ) Vout = +15V if V + > V - -15V if V + < V -

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11 Flash ADC For n-bit, use 2 n -1 comparators Each comparator has its own threshold voltage, separated by 1 LSB The input to all comparators in parallel ( one clock cycle) Output goes to an encoder to get binary format 3-bit ADC

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12 Flash ADC Very fast (basically only one clock cycle): good to process high rate events (10k Hz etc) Buy requires so many comparators for high accuracy (good resolution): very expansive. (32-bit : 4X10E9 comparators )

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13 Slope Converter Use one integrator and one comparator Slope ~ 1/RC* Vin

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14 Slope Converter ADC Advantage: good resolution with only two comparators Does not require precise components: cheap, designed to average out noise Disadvantage: slow, 2 n clock cycles for n-bits

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15 Successive Approximation ADC Use a successive approximation register Comparator: check Vin vs DAC reference signal ( MSB --> LSB ): binary search Advantage: faster, only n clock cycles for n-bit Disadvantage: register for DAC need to be extremely accurate

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16 DAC (Digital-Analogue-Converter) MSB LSB

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