1. Digital Logic & Design Dr. Waseem Ikram Lecture 45

2. Recap Logic Block Multiple Logic Elements LUT, flip-flop, cascade logic Control logic, programmable selects

3. Recap Implementing function by Programming LUT Example 1 Example 2 full adder Programming Row & Column interconnects through transistor switches.

4. Recap Conversion of real world quantities Mobile phones Digital Thermometers Digital storage of sound and pictures Digital voltmeters Industrial control and monitoring.

5. Recap Sampling Under-sampling Over-sampling Sampling frequency Nyquist frequency Holding Sampled value Sample and Hold Circuit

6. Recap Quantization Process of converting analogue value to a code Few bits, quantization levels less accurate More bits, quantization levels more accurate

7. Recap Linear Amplifier Inverting/Non-inverting inputs Single outputs High input impedance Low output impedance Very High voltage gain Inverting Amplifier Comparator

8. Recap FLASH Converter Fast conversion time Expensive circuit complexity Resistor voltage divider Multiple Op-Amps as comparators Input signal connected to all comparators Comparator o/p high if i/p higher than ref Priority encoder Encoder o/p is digital equivalent of i/p

9. Recap DUAL-SLOPE A/D Converter Slower than FLASH Used in Digital voltmeters and other measuring instruments Ckt. Diagram Working

10. Successive Approximation Converter Widely used Faster conversion time w.r.t. dual slope Explain operation Circuit diagram (fig 1)

11. A/D Converter Errors Missing Code (fig 14.26a) Incorrect Code (fig 14.26b) Offset (fig 14.26c)

12. Binary-Weighted-Input D/A Converter Summer Weighted Resistors Circuit (fig 3, tab 2) Disadvantage Weighted resistors of exact value

13. R/2R Ladder D/A Converter Circuit (fig 4) Equivalent circuit (fig 5a) Simplified circuit (fig 5b, table 3)

14. Performance Characteristics of D/A Converters Resolution Number of bits that are converted Reciprocal of the number of discrete steps in the output expressed in percentage 4-bit D/A has a resolution of 6.67% (1/15 x 100) Accuracy Actual o/p of a D/A w.r.t. expected o/p Expressed as a percentage of full-scale o/p O/p = 10 v accuracy is 0.1% then max error is 10mV Should not be +/-1/2 least sign. bit

15. Performance Characteristics of D/A Converters Linearity Deviation form the straight line output of a D/A Monotonicity DAC does not take any reverse steps when D/A sequenced over its entire range of input steps Settling time The time it takes the D/A to settle within +/- ½ LSB of its final value when a change occurs in its input

16. Successive-Approximation 4-bit A/D Converter

17. Successive-Approximation D/A Conversion V in SAR outputD/A outputComparator output 5.2100080 5.2010041 5.2011060 5.2010151

18. Missing Code ‘1001’

19. Incorrect Code

20. Offset Error

21. A 4-bit Binary-Weighted-Input D/A Converter

22. D/A Output voltages for binary inputs 0000 to 1111 InputCurrent through (mA)V out (volts) R2R4R8RRfRf 0000000000 00010000.625 0010001.250 -2 0011001.250.6251.875-3 010002.500 -4 010102.500.6253.125-5 011002.51.2503.75-6 011102.51.250.6254.375-7 100050005.0-8 10015000.6255.625-9 1010501.2506.25-10 1011501.250.6256.875-11 110052.5007.5-12 110152.500.6258.125-13 111052.51.2508.75-14 111152.51.250.6259.375-15

23. R/2R Ladder D/A Converter

24. The R/2R resistor network with binary 0001

25. The equivalent R/2R resistor network with binary 0001

26. D/A Output voltages for binary inputs 0000 to 1111 InputV th (volts)Current through R f V out 0000000 00010.625V0.625V/2R-0.625V 00101.25V1.25V/2R-1.25V 00111.875V1.875V/2R-1.875V 01002.5V2.5V/2R-2.5V 01013.125V3.125V/2R-3.125V 01103.75V3.75V/2R-3.75V 01114.325V4.325V/2R-4.325V 10005V5V/2R-5V 10015.625V5.625V/2R-5.625V 10106.25V6.25V/2R-6.25V 10116.875V6.875V/2R-6.875V 11007.5V7.5V/2R-7.5V 11018.125V8.125V/2R-8.125V 11108.75V8.75V/2R-8.75V 11119.325V9.325V/2R-9.325V