1 MOS Field-Effect Transistors (MOSFETs)
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith2 Figure 4.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) cross-section. Typically L = 0.1 to 3 m, W = 0.2 to 100 m, and the thickness of the oxide layer (t ox ) is in the range of 2 to 50 nm.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith3 Figure 4.2 The enhancement-type NMOS transistor with a positive voltage applied to the gate. An n channel is induced at the top of the substrate beneath the gate. MOSFET (IGFET)
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith4 Figure 4.3 An NMOS transistor with v GS > V t and with a small v DS applied. The device acts as a resistance whose value is determined by v GS. Specifically, the channel conductance is proportional to v GS – V t’ and thus i D is proportional to ( v GS – V t ) v DS. Note that the depletion region is not shown (for simplicity).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith5 Figure 4.4 The i D – v DS characteristics of the MOSFET in Fig. 4.3 when the voltage applied between drain and source, v DS, is kept small. The device operates as a linear resistor whose value is controlled by v GS.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith6 Figure 4.5 Operation of the enhancement NMOS transistor as v DS is increased. The induced channel acquires a tapered shape, and its resistance increases as v DS is increased. Here, v GS is kept constant at a value > V t.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith7 Figure 4.6 The drain current i D versus the drain-to-source voltage v DS for an enhancement-type NMOS transistor operated with v GS > V t.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith8 Figure 4.7 Increasing v DS causes the channel to acquire a tapered shape. Eventually, as v DS reaches v GS – V t’ the channel is pinched off at the drain end. Increasing v DS above v GS – V t has little effect (theoretically, no effect) on the channel’s shape.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith9 Figure 4.8 Derivation of the i D – v DS characteristic of the NMOS transistor.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith16 Figure 4.9 Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. Not shown are the connections made to the p-type body and to the n well; the latter functions as the body terminal for the p-channel device.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith17 Figure 4.10 (a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith18 Figure 4.11 (a) An n-channel enhancement-type MOSFET with v GS and v DS applied and with the normal directions of current flow indicated. (b) The i D – v DS characteristics for a device with k’ n (W/L) = 1.0 mA/V 2.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith19
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith20
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith21 Figure 4.12 The i D – v GS characteristic for an enhancement-type NMOS transistor in saturation (V t = 1 V, k’ n W/L = 1.0 mA/V 2 ).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith22 Figure 4.13 Large-signal equivalent-circuit model of an n-channel MOSFET operating in the saturation region.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith23 Figure 4.14 The relative levels of the terminal voltages of the enhancement NMOS transistor for operation in the triode region and in the saturation region.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith24 Figure 4.15 Increasing v DS beyond v DSsat causes the channel pinch-off point to move slightly away from the drain, thus reducing the effective channel length (by D L).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith25
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith26 Figure 4.16 Effect of v DS on i D in the saturation region. The MOSFET parameter V A depends on the process technology and, for a given process, is proportional to the channel length L.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith27
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith28 Figure 4.17 Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance r o. The output resistance models the linear dependence of i D on v DS and is given by Eq. (4.22).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith29 Figure 4.18 (a) Circuit symbol for the p-channel enhancement-type MOSFET. (b) Modified symbol with an arrowhead on the source lead. (c) Simplified circuit symbol for the case where the source is connected to the body. (d) The MOSFET with voltages applied and the directions of current flow indicated. Note that v GS and v DS are negative and i D flows out of the drain terminal.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith30
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith31 Figure 4.19 The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith32 Figure E4.8
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith38 Table 4.1
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith39 Figure 4.20 Circuit for Example 4.2. EXAMPLE 4.2 I D =0.4 mA V D =0.5 V µ n C ox =100 µA/V 2 W/L=32/1
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith40 Figure 4.21 Circuit for Example 4.3. EXAMPLE 4.3 I D =80 µA µ n C ox =200 µA/V 2 W/L=4/0.8
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith41 Figure E4.12
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith42 Figure 4.22 Circuit for Example 4.4. EXAMPLE 4.4 V D =0.1 V V t =1V µ n C ox (W/L)=1 mA/V 2
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith43 Figure 4.23 (a) Circuit for Example 4.5. (b) The circuit with some of the analysis details shown. EXAMPLE 4.5 V t =1 V µ n C ox W/L=1 mA/V 2
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith45 Figure 4.24 Circuit for Example 4.6. EXAMPLE 4.6
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith46 Figure 4.25 Circuits for Example 4.7.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith47 EXAMPLE 4.7
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith48 Figure E4.16
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith49 Figure 4.26 (a) Basic structure of the common-source amplifier. (b) Graphical construction to determine the transfer characteristic of the amplifier in (a).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith50 Figure 4.26 (Continued) (c) Transfer characteristic showing operation as an amplifier biased at point Q.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith52 Figure 4.27 Two load lines and corresponding bias points. Bias point Q 1 does not leave sufficient room for positive signal swing at the drain (too close to V DD ). Bias point Q 2 is too close to the boundary of the triode region and might not allow for sufficient negative signal swing.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith55 EXAMPLE 4.8
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith58 Figure 4.28 Example 4.8.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith59 Figure 4.28 (Continued)
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith60 Figure 4.29 The use of fixed bias (constant V GS ) can result in a large variability in the value of I D. Devices 1 and 2 represent extremes among units of the same type.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith61 Figure 4.30 Biasing using a fixed voltage at the gate, V G, and a resistance in the source lead, R S : (a) basic arrangement; (b) reduced variability in I D ; (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor C C1 ; (e) practical implementation using two supplies.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith62 Figure 4.31 Circuit for Example 4.9. EXAMPLE 4.9 k n W/L=1mA/V 2 V t =1 V Current change if V t =1.5V?
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith65 Figure 4.32 Biasing the MOSFET using a large drain-to-gate feedback resistance, R G.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith66 Figure 4.33 (a) Biasing the MOSFET using a constant-current source I. (b) Implementation of the constant-current source I using a current mirror.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith68 Figure 4.34 Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith71 Figure 4.35 Small-signal operation of the enhancement MOSFET amplifier.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith73 Figure 4.36 Total instantaneous voltages v GS and v D for the circuit in Fig
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith74 Figure 4.37 Small-signal models for the MOSFET: (a) neglecting the dependence of i D on v DS in saturation (the channel-length modulation effect); and (b) including the effect of channel-length modulation, modeled by output resistance r o = |V A | /I D.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith75
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith76 Figure 4.38 Example 4.10: (a) amplifier circuit; (b) equivalent-circuit model. EXAMPLE 4.10 Vt=1.5 V k n ’(W/L)=0.25 mA/V 2 V A =50 V A v ?
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith80 Figure 4.39 Development of the T equivalent-circuit model for the MOSFET. For simplicity, r o has been omitted but can be added between D and S in the T model of (d).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith81 Figure 4.40 (a) The T model of the MOSFET augmented with the drain-to-source resistance r o. (b) An alternative representation of the T model.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith82 Figure 4.41 Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith84 Table 4.2
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith85 Figure 4.42 Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith86 Figure E4.30 K n ’(W/L)=1 mA/V 2 V t =1.5 V
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith89 EXAMPLE 4.11 v i (mV)v o (mV) Without R L 9 90 With R L 8 70 V sig = 10 mV R sig = 100 kohm R L = 10 kohm
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith93 Figure 4.43 (a) Common-source amplifier based on the circuit of Fig (b) Equivalent circuit of the amplifier for small-signal analysis. (c) Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith96 Figure 4.44 (a) Common-source amplifier with a resistance R S in the source lead. (b) Small-signal equivalent circuit with r o neglected.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith99 Figure 4.45 (a) A common-gate amplifier based on the circuit of Fig (b) A small-signal equivalent circuit of the amplifier in (a). (c) The common-gate amplifier fed with a current-signal input.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith103 Figure 4.46 (a) A common-drain or source-follower amplifier. (b) Small-signal equivalent-circuit model. (c) Small-signal analysis performed directly on the circuit. (d) Circuit for determining the output resistance R out of the source follower.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith110 Figure 4.47 (a) High-frequency equivalent circuit model for the MOSFET. (b) The equivalent circuit for the case in which the source is connected to the substrate (body). (c) The equivalent circuit model of (b) with C db neglected (to simplify analysis).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith111 Figure 4.48 Determining the short-circuit current gain I o /I i.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith114 Figure 4.49 (a) Capacitively coupled common-source amplifier. (b) A sketch of the frequency response of the amplifier in (a) delineating the three frequency bands of interest.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith116 Figure 4.50 Determining the high-frequency response of the CS amplifier: (a) equivalent circuit; (b) the circuit of (a) simplified at the input and the output;
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith117 Figure 4.50 (Continued) (c) the equivalent circuit with C gd replaced at the input side with the equivalent capacitance C eq ; (d) the frequency response plot, which is that of a low-pass single-time-constant circuit.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith123 Figure 4.51 Analysis of the CS amplifier to determine its low-frequency transfer function. For simplicity, r o is neglected.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith126 Figure 4.52 Sketch of the low-frequency magnitude response of a CS amplifier for which the three break frequencies are sufficiently separated for their effects to appear distinct.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith128 Figure 4.53 The CMOS inverter.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith129 Figure 4.54 Operation of the CMOS inverter when v I is high: (a) circuit with v I = V DD (logic-1 level, or V OH ); (b) graphical construction to determine the operating point; (c) equivalent circuit.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith130 Figure 4.55 Operation of the CMOS inverter when v I is low: (a) circuit with v I = 0 V (logic-0 level, or V OL ); (b) graphical construction to determine the operating point; (c) equivalent circuit.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith132 Figure 4.56 The voltage transfer characteristic of the CMOS inverter.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith135 Figure 4.57 Dynamic operation of a capacitively loaded CMOS inverter: (a) circuit; (b) input and output waveforms; (c) trajectory of the operating point as the input goes high and C discharges through Q N ; (d) equivalent circuit during the capacitor discharge.
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith141 Figure 4.59 (a) Circuit symbol for the n-channel depletion-type MOSFET. (b) Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith142 Figure 4.60 The current-voltage characteristics of a depletion-type n-channel MOSFET for which V t = –4 V and k n (W/L) = 2 mA/V 2 : (a) transistor with current and voltage polarities indicated; (b) the i D – v DS characteristics; (c) the i D – v GS characteristic in saturation.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith143 Figure 4.61 The relative levels of terminal voltages of a depletion-type NMOS transistor for operation in the triode and the saturation regions. The case shown is for operation in the enhancement mode ( v GS is positive).
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith144 Figure 4.62 Sketches of the i D – v GS characteristics for MOSFETs of enhancement and depletion types, of both polarities (operating in saturation). Note that the characteristic curves intersect the v GS axis at V t. Also note that for generality somewhat different values of |V t | are shown for n-channel and p-channel devices.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith145 Figure E4.51
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Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith152 Figure 4.63 Capture schematic of the CS amplifier in Example 4.14.
Copyright 2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith153 Figure 4.64 Frequency response of the CS amplifier in Example 4.14 with C S = 10 F and C S = 0 (i.e., C S removed).
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