1. Metal-Oxide Semiconductor (MOS) Field-Effect Transistors (MOSFETs)1

2. Compared to Bipolar Junction Transistors (BJT), MOSTFETs;
Introduction
- Transistors are three-terminal devices.
- Voltage between two terminal controls the current flowing in the third terminal.
- Amplifiers, or switches.
Compared to Bipolar Junction Transistors (BJT), MOSTFETs;
- Can be made quite small (require small area).
- Can be manufactured with simple fabrication process.
- Can be operated with little power.
- Can be integrated densely (>200 millions on a single IC chip, Very-large-scale-integrated circuit, VLSI).
- Digital and analog functions can be implemented almost exclusively ( i.e., with very few or no resistors).
- Digital and analog functions can be implemented on the same IC chip (mixed-signal design).
4.1 Device Structure and Physical Operation
The enhancement-type MOSFET is the most widely used field-effect transistor.
4.1.1 Device Structure – (n-channel enhancement-type MOSFET = enhancement-type NMOS)
0.2~100 μm
2-~50 nm
0.1~3 μm
MOS
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3. Field-Effect Transistor (FET) !
Another name for the MOSFET:
Insulated-gate FET, IGFET (almost no current through the gate : ~10-15 A)
4.1.2 Operation with No gate Voltage
Between drain and source : Back-to-back pn junction
No current flow
4.1.3 Creating a Channel for current flow
- An n-channel is formed in a p-type substrate – inversion layer.
- If a voltage is applied between drain and source, current flows through this n-channel. (NMOS)
- Threshold voltage Vt : a voltage of υGS at which a sufficient number of mobile electrons accumulate in the channel region to form a conducting channel.(+0.5 ~ 1 V)
- The gate and the channel form a capacitor.
- The positive charges on the gate and the electrons in the channel develop an electric field.
- This electric field controls the current flow in the channel.
Field-Effect Transistor (FET) !
Figure 4.2 The enhancement-type NMOS transistor with a positive voltage applied to the gate. An n channel is induced at the top of the substrate beneath the gate.
sedr42021_0402.jpg
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4. 4.1.4 Applying a Small VDS (< 50 mV)
The device acts as a resistance whose value is determined by υGS. Specifically, the channel conductance is proportional to υGS – Vt’ and thus iD is proportional to (υGS – Vt) υDS.
(υGS – Vt) : excess gate voltage, effective voltage, overdrive voltage
4.1.5 Operation as VDS increased.
- As υDS is increased υGD =υGS – υDS decreases and channel takes the tapered form, and resistance between the drain and gate increases.
sedr42021_0403.jpg
- At υGD =υGS – υDS = Vt or υDS = υGS - Vt , the channel depth at the drain end is almost zero! – The channel is pinched off.
- Increasing υDS beyond this value has, theoretically, no effect on the channel shape and channel current.-Saturation!
When υDS = small or 0 V
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5. Figure 4.6 The drain current iD versus the drain-to-source voltage vDS for an enhancement-type NMOS transistor operated with vGS > Vt.
sedr42021_0406.jpg
Figure 4.7 Increasing vDS causes the channel to acquire a tapered shape. Eventually, as vDS reaches vGS – Vt’ the channel is pinched off at the drain end. Increasing vDS above vGS – Vt has little effect (theoretically, no effect) on the channel’s shape.
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6. 4.1.6 Derivation of the iD-vDS Relationship
sedr42021_0407.jpg
At the beginning of saturation region, υDS= υGS-Vt
Ex. 4.1 p245
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7. 4.1.8 Complementary MOS, or CMOS
4.1.7 The p-Channel MOSFET p.247
- NMOS has virtually replaced because it is smaller, faster, and needs lower supply voltage.
- The p-Channel MOSFET is fabricated on an n-type substrate with p+ regions for the drain and source.
- But you have to be familiar with PMOS because:
there are many discrete PMOSFETs and
there are complementary MOS, CMOS!!
- The p-Channel MOSFET has holes as charge carriers.
- υGS, υDS, and Vt are negative. The current flows from the source to the drain.
- PMOS technology originally dominated MOS manufacturing.
4.1.8 Complementary MOS, or CMOS
- CMOS is the most widely used of all the IC technologies in analog and digital circuit design !!
sedr42021_0409.jpg
Figure 4.9 Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. Not shown are the connections made to the p-type body and to the n well; the latter functions as the body terminal for the p-channel device.
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8. Detailed analysis of equations 4.5 and 4.6
4.2 Current-Voltage Characteristics
Detailed analysis of equations 4.5 and 4.6
Figure (a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.
4.2.1 Circuit Symbol
Normal direction of current flow.
4.2.2 The iD-vDS Characteristics
Amplifier - Saturation region
Switch – Cutoff and triode region
sedr42021_0410a.jpg
For the operation in the triode region,
and keep υDS small enough so that the channel remains continuous.
At υGD =υGS – υDS = Vt or υDS = υGS - Vt , the channel depth at the drain end is almost zero! – The channel is pinched off.
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9. For the operation in the saturation region,
The operation of the MOS transistor as a linear resistance whose value is controlled by gate voltage !
For the operation in the saturation region,
just same as for the triode operation.
(υGD =υGS – υDS)
At the boundary between triode and saturation region,
Eq.(4.20) shows that the saturation current is;
(1) independent of the drain voltage.
(2) determined by square of the gate voltage.
Eq.(4.20) also shows that the saturated MOSFET behaves as an ideal current source.
Figure Large-signal equivalent-circuit model of an n-channel MOSFET operating in the saturation region.
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10. At the boundary between triode and saturation region,
sedr42021_0414.jpg
Figure The relative levels of the terminal voltages of the enhancement NMOS transistor for operation in the triode region and in the saturation region.
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11. 4.2.3 Finite Output Resistance in Saturation
Eq.(4.20) shows that the saturation current is independent of the drain voltage.
But, in practice, increasing υDS beyond υDSsat does affect the channel length.
The phenomenon that the channel length is reduced form L to L-ΔL is known as channel-length modulation.
Figure Increasing vDS beyond vDSsat causes the channel pinch-off point to move slightly away from the drain, thus reducing the effective channel length (by ΔL).
sedr42021_0415.jpg
With extrapolation,
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12. 4.2.4 Characteristics of the p-Channel MOSFET
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13. 4.2.5 The Role of the Substrate-The Body Effect
- Usually, the source terminal is connected to the substrate (or body) terminal.
- In integrated circuit, many MOS transistors are fabricated on a single substrate.
- In order to maintain the cutoff condition for all the substrate-to-channel junctions, the substrate is usually connected to the most negative power supply in an NMOS circuit (the positive in a PMOS circuit).
- The reverse bias will widen the depletion region.
- The channel depth is reduced.
- To return the channel to its former states, υGS has to be increased.
The body effect can cause considerable degradation in circuit performance (Chap. 6)
4.2.6 Temperature Effect
4.2.7 Breakdown and Input Protection
- The overall observed effect of a temperature increase is a decrease in drain current.
- Weak avalanche : υDS (20~150 V) breakdown between drain and substrate.
- This very interesting result is put to use in applying the MOSFET in power circuit (Chap. 11).
- Punch-through : υDS (~20 V) breakdown between drain and source for short-channel devices.
- υGS (>30 V) breakdown between gate and source.
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17. 4.3 MOSFET Circuits at DC (Bias Analysis)
For the operation in the triode region,
- Neglect Channel-length modulation. (λ=0)
- Overdrive voltage VOV=VGS-Vt (VOV, Vt > 0, for NMOS)
- Overdrive voltage VSG=|VGS|=|Vt |+|VOV| for PMOS
For the operation in the saturation region,
EXAMPLE 4.2
Vt=0.7 V, μnCox =100 μA/V2, L=1 μm, W =32 μm
Design the circuit so that the transistor operates at ID = 0.4 mA and VD = +0.5 V
Since VD > VG, saturation region !
Thus source must be at -1.2 V.
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18. EXAMPLE 4.3
Design the circuit to obtain ID of 0.08 mA. R=? VD = ?, μnCox =200 μA/V2, L=0.8 μm.
VDS = VGS, Saturation region!
Let’s find VGS!
sedr42021_0421.jpg
Figure Circuit for Example 4.3.
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19. EXAMPLE 4.5 EXAMPLE 4.4 Vt=1 V, k’(W/L) 1 mA/V2
Design the circuit so that VD = +0.1 V.
What is the effective resistance between drain and source?
Assume saturation region operation.
Since VD < VG, and Vt =1 V, triode region !
sedr42021_0422.jpg
In practice, 12 kΩ, 5%
Saturation region operation!
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20. EXAMPLE 4.6 Vt= -1 V, k’(W/L) 1 mA/V2
- Design the circuit so that the transistor operate in saturation region at ID = 0.5 mA and VD = +3 V.
- What is the largest value that RD can have while maintaining saturation region operation?
For this, a possible selection is RG1=2 MΩ, RG2= 3MΩ
sedr42021_0424.jpg
- Overdrive voltage VSG=|VGS|=|Vt |+|VOV| for PMOS
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21. EXAMPLE 4.7 For υI =+2.5 V Vt= ±1 V, k’(W/L) 1 mA/V2 for NMOS and PMOS
- for QP, VGS = 0 V, cutoff !
- Find iDN, iDP, υO, for υI =0 V, +2.5 V, and -2.5 V.
υO should be negative for IDN.
υGD will be greater than Vt.
for QN, triode !
For υI = -2.5 V
For υI =0 V,
- Exact complement of +2.5 V
- QN and QP are perfectly matched.
- QN will be off.
- Equal |VGS| (2.5 V)
sedr42021_0425a.jpg
The circuit is symmetrical.
(upper and lower part)
for Qp, triode !
- Thus |VDG| = 0 V.
- Thus in saturation region !
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22. 4.4 The MOSFET as an Amplifier and as Switch
The MOSFET acts as a Voltage-Controlled Current Source !
Transconductance Amplifier !
Saturation Region !!!
υGS iD
Nonlinear !
For linear amplification, we need dc-bias voltage VGS and require small input signal υgs.
4.4.1 Large-Signal Operation-The Transfer Characteristics
4.4.2 Graphical Derivation of The Transfer Characteristics
Load-line equation
For a given input υI(υGS), We can find output υO (υDS).
sedr42021_0426a.jpg
Basic structure of the Common-Source (CS)
(ground-source) amplifier.
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23. 4.4.2 Graphical Derivation of The Transfer Characteristics
υI = υGS
4.4.3 Operation as a Switch
sedr42021_0426c.jpg
Turn off : υI < Vt, somewhere on XA
Turn on : υI close to VDD, close to C
Digital Logic Inverter !
4.4.4 Operation as a Linear Amplifier
Between A and B
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24. Taylor expansion, (1+x)-1 =1- x+ x2/2-….
4.4.5 Analytical Expression for the Transfer Characteristics
Cutoff-region, XA:
υI < Vt,
υO = VDD
Saturation-region AQB:
υI ≥ Vt,
υO ≥ υI - Vt
At Q,
For dc bias point Q, υI = VIQ,
υO = VOQ ,
End point of the saturation region
Triode-region BC:
υI ≥ Vt,
υO ≤ υI - Vt
small
Taylor expansion, (1+x)-1 =1- x+ x2/2-….
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EXAMPLE 4.8, p.277

25. ID, VGS can be determined.
4.5 Biasing in MOS Amplifier Circuits
Biasing by Fixing VGS
- Large ΔID !, Not useful !
The spread in the values of parameters (e.g. W/L) is large among the same type of MOSFET.
Biasing by Fixing VGS and Resistor in the Source
- Good for discrete MOSFET
Biasing Using a Drain-to-Gate Feedback Resistor
- Good for discrete MOSFET
Biasing Using a Constant-Current Source
Figure The use of fixed bias (constant VGS) can result in a large variability in the value of ID. Devices 1 and 2 represent extremes among units of the same type.
- Good for IC
Biasing by Fixing VGS and Resistor in the Source
Excellent Biasing Technique for Discrete MOSFET Circuits
- For given VG and RS, }
ID, VGS can be determined.
sedr42021_0429.jpg
- For two FETs of the same type,
Smaller ΔID than that of Fig. 4.39
- For one FET,
ID increases. –> (4.46) VGS decreases.
–> (a) ID decreases.–> ID is stabilizes.
Rs provides negative feedback resulting in stabilized ID. Degeneration resistance
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26. (c) practical implementation using a single supply
(a) basic arrangement
(c) practical implementation using a single supply
(d) coupling of a signal source to the gate using a capacitor CC1
For Fig. c and d
- RG : ~ MΩ for large input impedance to the signal source (Fig. d)
CC1 : large capacitance, coupling, signal dc block not to disturb bias.
suitable only in discrete circuit design (Sect. 4.7).
RD : large enough to obtain high gain,
small enough to allow for swing and operation in saturation. (Ex4.6)
sedr42021_0430a.jpg
For Fig. e
- RG : for a dc ground at the gate
for a high input impedance to a signal source.
(e) practical implementation using two supplies.
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27. As a rule of thumb for design,
EXAMPLE 4.9
Design!
Vt=1 V, k’(W/L) 1 mA/V2
Sol)
As a rule of thumb for design,
One-third of the power supply voltage as a drop across each of RD, MOSFET, RS.
sedr42021_0431.jpg
Figure Circuit for Example 4.9.
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28. } 4.5.3 Biasing Using a Drain-to-Gate Feedback Resistor
- Good for Discrete MOSFET
- RG : Feedback resistor
~ MΩ
- Feedback mechanism – negative feedback or degeneration
ID increases. – (4.49) VGS decreases. – (a) ID decreases.
ID is stabilizes !
Bias for Common source amplifier
Drawback of a limited output voltage swing.
What about shorting gate and drain instead of RG?
Biasing Using a Constant-Current Source
- Good for IC
- RG : ~ MΩ for large input impedance to the signal source, for a dc ground at the gate.
- RD : for dc voltage at the drain, for output signal swing, for operation in saturation.
- Constant-current source : Q1 is the heart of the circuit
Drain is shorted to the gate – saturation !
sedr42021_0432.jpg }
ID1, VGS can be determined.
ID2 can be determined.
What about design ?
Implementation of the constant-current source using a current mirror.
D4.22, p286
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29. 4.6 Small-Signal Operation and Models
The signal current in the drain terminal
dc bias current
Current proportional to input
Nonlinear distortion
To reduce the nonlinear distortion,
Figure Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.
If this small-signal condition is satisfied,
sedr42021_0434.jpg
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30. For small-signal condition
The Voltage Gain
For small-signal condition
For out of cutoff
For saturation
Figure Total instantaneous voltages vGS and vD for the circuit in Fig
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31. For the signal analysis,
Separating the DC Analysis and the Signal Analysis
For the signal analysis,
Ideal constant voltage sources are replaced by short circuits.
Ideal constant current sources are replaced by open circuits.
4.6.5 Small-signal Equivalent-Circuit Model
FET behaves as a voltage-controlled current source.
The input impedance is very, very high.
The output impedance is also high.
Small-signal models for the MOSFET
(a) neglecting the dependence of iD on vDS in saturation (the channel-length modulation effect
(b) including the effect of channel-length modulation, modeled by output resistance ro = |VA| /ID.
sedr42021_0437a.jpg
To include the channel-length modulation,
For PMOS,
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32. 4.6.6 The Transconductance gm
- For large gm, we need
large (W/L) and (VGS - Vt).
- However, large VG has disadvantage of reducing the allowable voltage signal swing at the drain.
cf.) Transconductance of BJT is proportional to the bias current and independent of physical size and geometry of the device.
Practical example
- gm = 0.35 mA/V for W/L =1
- gm = 3.5 mA/V for W/L =100
- gm = 20 mA/V for BJT with IC = 0.5 mA.
Three Design Parameters
W/L, VOV, ID
Two the above can be chosen independently.
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33. } EXAMPLE 4.10 Sol) Vt=1.5 V, kn’ (W/L) =0.25 mA/V2, VA = 50 V.
Small-signal gain=?, input resistance=?, maximum input signal =?
sedr42021_0438a.jpg
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34. 4.6.6 The T Equivalent-Circuit Model
sedr42021_0439.jpg
T Model
Hybrid-π Model
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36. sedr42021_tb0402a.jpg
Table 4.2
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37. 4.7 Single-Stage MOS Amplifiers (Discrete circuits)
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39. 4.7 Single-Stage MOS Amplifiers (Discrete circuits)
IC MOS amplifiers : Chap. 6
4.7 is useful to understand IC amplifier.
4.7.1 The Basic Structure
4.7.2 Characterizing Amplifiers
The material of Sect. 1.5 was limited to unilateral amplifiers.
Now, let’s include non-unilateral amplifiers.
Source : υsig + Rsig. Real signal source or previous amplifier.
Load : RL. Real load or previous amplifier.
2. Ri, Ro, Aυo, Ais, Gm do not depend on the value of Rsig and RL.
Rin, Rout, Aυ, Ai, Gυo, Gυ may depend on the value of Rsig and RL.
sedr42021_0442.jpg
3. For non-unilateral amplifiers, Rin may depends on RL, Rout may depends on Rsig.
For unilateral amplifiers, Rin = Ri, Rout = Ro.
Figure Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations.
4. The loading of the amplifier on the signal is determined by the input resistance Rin.
5. When evaluating the gain Aυ from the open-circuit gain Aυo, Ro is the output to use.
Chap. 4 : unilateral only
Chap. 6 : non-unilateral also
When evaluating the overall voltage gain Gυ from its open-circuit value Gυo, Rout is the output to use.
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40. EXAMPLE 4.11, p304 υsig = 10 mV, Rsig= 100 kΩ. RL. = 10 kΩ υi (mV)
υo (mV)
w/o RL 9 90
with RL 8 70
Find all the amplifier parameters.
To determine υi, we need to know the value of Rin obtained with RL=0.
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41. } 4.7.3 The Common-Source (CS) Amplifiers
- The most widely used of all MOSFET amplifier circuits.
Bypass capacitor (~μF)
Bypass capacitor (~μF)
For signal ground
Figure (a) Common-source amplifier based on the circuit of Fig
(b) Equivalent circuit of the amplifier for small-signal analysis.
sedr42021_0443a.jpg }
(c) Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.
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42. } 4.7.4 The Common-Source (CS) Amplifier with a Source Resistance
RSac
RSdc
Figure (a) Common-source amplifier with a resistance RS in the source lead.
(b) Small-signal T-equivalent circuit with ro neglected.
- The effect ro is not important (SPICE) in discrete-circuit amp.
- The effect ro plays major role and must be taken into account in IC amp.
sedr42021_0444a.jpg }
- Rs increases dc bias stability. (Sect. 4.5)
Rs decreases υgs to reduce nonlinear distortion.
(4.86), (4.58)
Need trade-off !
- Rs increases the bandwidth (Sect. 4.12).
- Rs decreases gain. (4.90)
Split RS !!
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43. 4.7.5 The Common-Gate (CG) Amplifier
(b) A small-signal equivalent circuit of the amplifier in (a).
sedr42021_0445a.jpg
Figure (a) A common-gate amplifier based on the circuit of Fig
(c) The common-gate amplifier fed with a current-signal input.
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44. Unity-gain current amplifier, current follower !
CG amplifier is applied to the cascode circuit.
1. Unlike the CS amplifier (inverting), CG amp is non-inverting.
2. While the CS amplifier has a very high input impedance, that of the CG amp is low.
3. Overall voltage gain of the CG amp is smaller than that of CS amp by the factor of 1+ gmRsig.
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45. 4.7.5 The Common-Drain (CD) or Source-Follower Amplifier
ac ground
Figure (a) A common-drain or source-follower amplifier.
(b) Small-signal equivalent-circuit model.
sedr42021_0446a.jpg
(c) Small-signal analysis performed directly on the circuit.
(d) Circuit for determining the output resistance Rout of the source follower.
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46. The source follower has a very high input impedance,
a relatively low output impedance,
a gain less than but close to unity.
Unity-gain buffer amplifier ! (Sect. 1.5)
Output stage of multi-stage amplifier !
means the voltage at the source follows that at the gate.
Source follower !
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