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2. Content Physical operation and current-voltage characteristics DC analysis Biasing in MOS amplifier circuit and basic configuration

3. FET: Field Effect Transistor There are two types  MOSFET: metal-oxide-semiconductor FET  JFET: Junction FET MOSFET is also called the insulated-gate FET or IGFET.  Quite small  Simple manufacturing process  Low power consumption  Widely used in VLSI circuits( >800 million on a single IC chip) Introduction to FET

4. Device structure of MOSFET (n-type) p-type Semiconductor Substrate (Body) Body(B) n+n+ n+n+ Oxide (SiO 2 ) Source(S) Gate(G) Drain(D) Metal For normal operation, it is needed to create a conducting channel between Source and Drain Channel area

5.  An n channel can be induced at the top of the substrate beneath the gate by applying a positive voltage to the gate  The channel is an inversion layerinversion layer  The value of V GS at which a sufficient number of mobile electrons accumulate to form a conducting channel is called the threshold voltage (V t ) Creating a channel for current flow

6.  L = 0.1 to 3  m  W = 0.2 to 100  m  T ox = 2 to 50 nm Device structure of MOSFET (n-type) Cross-section view

7. According to the type of the channel, FETs can be classified as  MOSFET  N channel  P channel  JFET  P channel  N channel Classification of FET Enhancement type Depletion type Enhancement type Depletion type

8. Drain current under small voltage v DS  An NMOS transistor with v GS > V t and with a small v DS applied.  The channel depth is uniform and the device acts as a resistance.  The channel conductance is proportional to effective voltage, or excess gate voltage, ( v GS – V t ).  Drain current is proportional to ( v GS – V t ) and v DS.

9. Drain current under small voltage v DS

10.  The induced channel acquires a tapered shape.  Channel resistance increases as v DS is increased.  Drain current is controlled by both of the two voltages. Operation as v DS is increased B

11. When V GD = V t or V GS - V DS = V t, the channel is pinched off  Inversion layer disappeared at the drain point  Drain current does not disappeared! Channel pinched off

12. Drain current under pinch off The electrons pass through the pinch off area at very high speed so as the current continuity holds, similar to the water flow at the Yangtze Gorges Pinched-off channel

13. Drain current is saturated and only controlled by the v GS Drain current under pinch off

14. v GS creates the channel. Increasing v GS will increase the conductance of the channel. At saturation region only the v GS controls the drain current. At subthreshold region, drain current has the exponential relationship with v GS Drain current controlled by v GS

15. Two reasons for readers to be familiar with p channel device p channel device  Existence in discrete-circuit.  More important is the utilization of complementary MOS or CMOS circuits.CMOS

16. Structure of p channel device  The substrate is n type and the inversion layer is p type.  Carrier is hole.  Threshold voltage is negative.  All the voltages and currents are opposite to the ones of n channel device.  Physical operation is similar to that of n channel device. p channel device

17.  The PMOS transistor is formed in n well.  Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well.  CMOS is the most widely used of all the analog and digital IC circuits. Complementary MOS or CMOS

18. Circuit symbol Output characteristic curves Channel length modulation Characteristics of p channel device Body effect Temperature effects and Breakdown Region Current-voltage characteristics

19. (a)Circuit symbol for the n-channel enhancement-type MOSFET. (b)Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant. Circuit symbol

20. (a)An n-channel enhancement- type MOSFET with v GS and v DS applied and with the normal directions of current flow indicated. (b)The i D – v DS characteristics for a device with k’ n (W/L) = 1.0 mA/V 2. Output characteristic curves of NMOS

21. Three distinct region  Cutoff region  Triode region  Saturation region Characteristic equations Circuit model Output characteristic curves of NMOS

22. Biased voltage The transistor is turned off. Operating in cutoff region as a switch. Cutoff region

23. Biased voltage The channel depth changes from uniform to tapered shape. Drain current is controlled not only by v DS but also by v GS Triode region process transcon- ductance parameter

24. Assuming that the draint-source voltage is sufficiently small, the MOS operates as a linear resistance Triode region

25. Biased voltage The channel is pinched off. Drain current is controlled only by v GS Drain current is independent of v DS and behaves as an ideal current source. Saturation region

26.  The i D – v GS characteristic for an enhancement-type NMOS transistor in saturation  V t = 1 V, k’ n W/L = 1.0 mA/V 2  Square law of i D – v GS characteristic curve. Saturation region

27. Explanation for channel length modulation  Pinched point moves to source terminal with the voltage v DS increased.  Effective channel length reduced  Channel resistance decreased  Drain current increases with the voltage v DS increased. Current drain is modified by the channel length modulation Channel length modulation

28. The MOSFET parameter V A depends on the process technology and, for a given process, is proportional to the channel length L. Channel length modulation

29. MOS transistors don’t behave an ideal current source due to channel length modulation. The output resistance is finite. The output resistance is inversely proportional to the drain current. Channel length modulation

30. Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance r o. The output resistance models the linear dependence of i D on v DS Large-signal equivalent circuit model

31. (a)Circuit symbol for the p-channel enhancement-type MOSFET. (b)Modified symbol with an arrowhead on the source lead. (c)Simplified circuit symbol for the case where the source is connected to the body. Characteristics of p channel device

32.  The MOSFET with voltages applied and the directions of current flow indicated.  The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region. Characteristics of p channel device

33. Large-signal equivalent circuit model of the p-channel MOSFET in saturation, incorporating the output resistance r o. The output resistance models the linear dependence of i D on v DS Characteristics of p channel device

34. In discrete circuit usually there is no body effect due to the connection between body and source terminal. In IC circuit the substrate is connected to the most negative power supply for NMOS circuit in order to maintain the pn junction reversed biased. The body effect---the body voltage can control i D  Widen the depletion layer  Reduce the channel depth  Threshold voltage is increased  Drain current is reduced The body effect can cause the performance degradation. The body effect

35. Temperature effects and breakdown region Drain current will decrease when the temperature increase. Breakdown  Avalanche breakdown  Punched-through  Gate oxide breakdown

36. 1. Assuming device operates in saturation thus i D satisfies with i D ~v GS equation. 2. According to biasing method, write voltage loop equation. 3. Combining above two equations and solve these equations. 4. Usually we can get two value of v GS, only the one of two has physical meaning. MOSFET amplifier: DC analysis

37. 5. Checking the value of v DS i. if v DS ≥v GS -V t, the assuming is correct. ii. if v DS ≤v GS -V t, the assuming is not correct. We shall use triode region equation to solve the problem again. DC analysis

38. The NMOS transistor is operating in the saturation region due to Examples of DC analysis

39.  Assuming the MOSFET operate in the saturation region  Checking the validity of the assumption  If not to be valid, solve the problem again for triode region Examples of DC analysis

40. The MOSFET as an amplifier Graph determining the transfer characteristic of the amplifier Basic structure of the common-source amplifier

41. The MOSFET as an amplifier and as a switch vivi Time vIvI vovo  Transfer characteristic showing operation as an amplifier biased at point Q.  Three segments:  XA---the cutoff region segment  AQB---the saturation region segment  BC---the triode region segment

42. Voltage biasing scheme  Biasing by fixing voltage (constant V GS )  Biasing with feedback resistor Current-source biasing scheme Biasing in MOS amplifier circuits  Disadvantage of fixing biasing  Fixing biasing may result in large I D variability due to deviation in device performance  Current becomes temperature dependent  Unsuitable biasing method

43.  Biasing using a resistance in the source lead can reduce the variability in I D  Coupling of a signal source to the gate using a capacitor C C1 Biasing in MOS with feedback resistor

44. Implementing a constant-current source using a current mirror Biasing in MOS with current-source Biasing the MOSFET using a constant-current source I

45. The ac characteristic  Definition of transconductance  Definition of output resistance  Definition of voltage gain Small-signal model  Hybrid π model  T model  Modeling the body effect Small-signal operation and models

46.  Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.  Small signal condition The conceptual circuit

47. With the channel-length modulation the effect by including an output resistance The small-signal models Without the channel-length modulation effect — transconductance

48. An alternative representation of the T model The small-signal models The T model of the MOSFET augmented with the drain-to- source resistance r o

49. Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body. Modeling the body effect

50. Characteristic parameters Three configurations  Common-source configuration  Common-drain configuration  Common-gate configuration Single-stage MOS amplifier

51. Input resistance with no load Input resistance Open-circuit voltage gain Voltage gain Definitions

52. Short-circuit current gain Current gain Short-circuit transconductance gain Open-circuit overall voltage gain Overall voltage gain Output resistance Definitions

53. Voltage divided coefficient Hence the appropriate configuration should be chosen according to the signal source and load properties, such as source resistance, load resistance, etc Relationships

54. Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations. Basic structure of the circuit

55.  The simplest common-source amplifier biased with constant- current source.  C C1 And C C2 are coupling capacitors.  C S is the bypass capacitor. The common-source amplifier

56. Equivalent circuit of the CS amplifier

57. Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized. Equivalent circuit of the CS amplifier

58. Input resistance Voltage gain Overall voltage gain Output resistance Characteristics of CS amplifier  Summary of CS amplifier  Very high input resistance  Moderately high voltage gain  Relatively high output resistance

59. The CS amplifier with a source resistance

60. Small-signal equivalent circuit with r o neglected  Voltage gain  Overall voltage gain R S takes the effect of negative feedback Gain is reduction by (1+g m R S )

61.  Biasing with constant current source I  Input signal v sig is applied to the source  Output is taken at the drain  Gate is signal grounded  C C1 and C C2 are coupling capacitors The Common-Gate amplifier

62. The CG amplifier  A small-signal equivalent circuit  T model is used in preference to the π model  R o is neglecting

63. The CG amplifier fed with a current-signal input Voltage gain Overall voltage gain

64. Noninverting amplifier Low input resistance Relatively high output resistance Current follower Superior high-frequency performance Summary of CG amplifier

65.  Biasing with current source  Input signal is applied to gate, output signal is taken at the source The common-drain or source-follower amplifier

66. The CD or source-follower amplifier  Small-signal equivalent- circuit model  T model makes analysis simpler  Drain is signal grounded Overall voltage gain

67. Circuit for determining the output resistance

68. Very high input resistance Voltage gain is less than but close to unity Relatively low output resistance Voltage buffer amplifier Power amplifier Summary of CD or source-follow amplifier

69. The CS amplifier is the best suited for obtaining the bulk of gain required in an amplifier. Including resistance R S in the source lead of CS amplifier provides a number of improvements in its performance. The low input resistance of CG amplifier makes it useful only in specific application. It has excellent high- frequency response. It can be used as a current buffer. Source follower finds application as a voltage buffer and as the output stage in a multistage amplifier. Summary and comparisons

70. Internal capacitances  The gate capacitive effect  Triode region  Saturation region  Cutoff region  Overlap capacitance  The junction capacitances  Source-body depletion-layer capacitance  drain-body depletion-layer capacitance High-frequency model The internal capacitance and high-frequency model

71. MOSFET operates at triode region MOSFET operates at saturation region MOSFET operates at cutoff region The gate capacitive effect

72. Overlap capacitance results from the fact that the source and drain diffusions extend slightly under the gate oxide. The expression for overlap capacitance Typical value Overlap capacitance This additional component should be added to C gs and C gd in all preceding formulas

73. Source-body depletion-layer capacitance drain-body depletion-layer capacitance The junction capacitances

74. High-frequency model

75. The equivalent circuit model with C db neglected (to simplify analysis) High-frequency model The equivalent circuit for the case in which the source is connected to the substrate (body)

76. Current gain Unity-gain frequency The MOSFET unity-gain frequency

77. The depletion-type MOSFET Physical structure  The structure of depletion-type MOSFET is similar to that of enhancement-type MOSFET with one important difference: the depletion-type MOSFET has a physically implanted channel  There is no need to induce a channel  The depletion MOSFET can be operated at both enhancement mode and depletion mode

78. Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S). Circuit symbol for the n-channel depletion-MOS Circuit symbol for the n- channel depletion-type MOSFET

79. Characteristic curves  Expression of characteristic equation  Drain current with the i D –v GS characteristic in saturation

80.  Sketches of the i D – v GS characteristics for MOSFETs of enhancement and depletion types  The characteristic curves intersect the v GS axis at V t. The i D – v GS characteristic in saturation

81. The output characteristic curves

82. N - c h a n n e l Depletion layer G D S GDS n-type Semiconductor The junction FET P+P+P+P+ P+P+P+P+

83. U GS = 0 U GS < 0 U GS = U GS(off) D S P+P+P+P+ Physical operation under v DS =0 G P+P+P+P+DS P+P+P+P+ G P+P+P+P+ DS G P+P+P+P+ P+P+P+P+

84. The effect of U DS on I D for U GS(off) <U GS < 0