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MOS Field-Effect Transistors (MOSFETs)

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Presentation on theme: "MOS Field-Effect Transistors (MOSFETs)"— Presentation transcript:

1 MOS Field-Effect Transistors (MOSFETs)
Microelectronic Circuits Zhou Lingling Chapter 4 MOS Field-Effect Transistors (MOSFETs) 2018/11/7 J. Chen

2 Content 4.0 Introduction 4.1 Device Structure and Physical Operation 4.2 Current-Voltage Characteristics 4.3 MOSFET Circuits at DC 4.4 The MOSFET as an Amplifier and as a Switch 4.5 Biasing in MOS Amplifier Circuits 4.6 Small-Signal Operation and Models 4.7 Single-Stage MOS Amplifiers 4.8 The MOSFET Internal Capacitances and High-Frequency Model 4.9 Frequency Response of the CS Amplifier 4.10 The CMOS Digital Logic Inverter 4.11 The Depletion-Type MOSFET 4.12 The SPICE MOSFET Model and Simulation Example J. Chen 2018/11/7

3 Microelectronic Circuits Zhou Lingling
4.0 Introduction to FET Three-terminal devices are far more useful than two-terminal ones, because they can be used in a multitude of applications, signal amplification digital logic memory circuits. …… The basic principle  the use of the voltage between two terminals to control the current flowing in the third terminal. Transistor = transfer resistor J.P. Chen 2018/11/7

4 4.0 Introduction to FET FET: Field Effect Transistor
There are two types MOSFET: metal-oxide-semiconductor FET JFET: Junction FET MOSFET is also called the insulated-gate FET or IGFET. Quite small Simple manufacturing process Low power consumption Widely used in VLSI circuits(>billion on a single IC chip) J. Chen 2018/11/7

5 4.1 Device structure of MOSFET (n-type)
Gate(G) Source(S) Drain(D) Metal Oxide (SiO2) n+ p-type Semiconductor Substrate (Body) Channel area Body(B) For normal operation, it is needed to create a conducting channel between Source and Drain J. Chen 2018/11/7

6 4.1 Creating a channel for current flow
An n channel can be induced at the top of the substrate beneath the gate by applying a positive voltage to the gate The channel is an inversion layer The value of VGS at which a sufficient number of mobile electrons accumulate to form a conducting channel is called the threshold voltage (Vt) J. Chen 2018/11/7

7 4.1 Device structure of MOSFET
Main device dimensions channel length L channel width oxide thickness Tox ( 2 to 50 nm) feature size 特征尺寸 Cross-section view J. Chen 2018/11/7

8 4.1 Classification of FET According to the type of the channel, FETs can be classified as MOSFET N channel P channel JFET Enhancement type Depletion type Enhancement type Depletion type J. Chen 2018/11/7

9 4.1 Drain current @ small voltage vDS
An NMOS transistor with vGS > Vt and with a small vDS applied. The channel depth is uniform and the device acts as a resistance. The channel conductance is proportional to effective voltage, or excess gate voltage, (vGS – Vt) . Drain current is proportional to (vGS – Vt) and vDS. J. Chen 2018/11/7

10 4.1 Drain current @ small voltage vDS
J. Chen 2018/11/7

11 4.1 Operation as vDS is increased
The induced channel acquires a tapered shape. Channel resistance increases as vDS is increased. Drain current is controlled by both of the two voltages. B J. Chen 2018/11/7

12 4.1 Channel pinched off When VGD = Vt or VGS - VDS = Vt , the channel is pinched off Inversion layer almost disappeared at the drain point Drain current does not disappeared! J. Chen 2018/11/7

13 4.1 Drain current @ pinch off
The electrons pass through the pinch off area at very high speed so as the current continuity holds, similar to the water flow at the Yangtze Gorges Pinched-off channel J. Chen 2018/11/7

14 4.1 Drain current @ pinch off
Drain current is saturated and only controlled by the vGS J. Chen 2018/11/7

15 4.1 Drain current controlled by vGS
vGS creates the channel. Increasing vGS will increase the conductance of the channel. At saturation region only the vGS controls the drain current. At subthreshold region, drain current has the exponential relationship with vGS J. Chen 2018/11/7

16 4.1 p channel device Two reasons for readers to be familiar with p channel device Existence in discrete-circuit. More important is the utilization of complementary MOS or CMOS circuits. J. Chen 2018/11/7

17 4.1 p channel device Structure of p channel device
The substrate is n type and the inversion layer is p type. Carrier is hole. Threshold voltage is negative. All the voltages and currents are opposite to the ones of n channel device. Physical operation is similar to that of n channel device. J. Chen 2018/11/7

18 4.1 Complementary MOS or CMOS
The PMOS transistor is formed in n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. CMOS is the most widely used of all the analog and digital IC circuits. J. Chen 2018/11/7

19 4.2 Current-voltage characteristics
Circuit symbol Output characteristic curves Channel length modulation Characteristics of p channel device Body effect Temperature effects and Breakdown Region J. Chen 2018/11/7

20 4.2 Circuit symbol Circuit symbol for the n-channel enhancement-type MOSFET. Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant. J. Chen 2018/11/7

21 4.2 Output characteristic curves
An n-channel enhancement-type MOSFET with vGS and vDS applied and with the normal directions of current flow indicated. The iD–vDS characteristics for a NMOS device Three distinct region Cutoff region Triode region Saturation region J. Chen 2018/11/7

22 The transistor is turned off.
4.2 Cutoff region Biased voltage The transistor is turned off. Operating in cutoff region as a switch. J. Chen 2018/11/7

23 4.2 Triode region Biased voltage
The channel depth changes from uniform to tapered shape. Drain current is controlled not only by vDS but also by vGS 𝑖.𝑒. 𝑉 𝐺𝐷 = 𝑉 𝐺𝑆 − 𝑉 𝐷𝑆 > 𝑉 𝑡 process transconductance parameter J. Chen 2018/11/7

24 4.2 Triode region Assuming that the drain-source voltage is sufficiently small, the MOS operates as a linear resistance J. Chen 2018/11/7

25 4.2 Saturation region Biased voltage The channel is pinched off.
Drain current is controlled only by vGS Drain current is independent of vDS and behaves as an ideal current source. J. Chen 2018/11/7

26 4.2 Saturation region Square law of iD–vGS characteristic curve.
The iD–vGS characteristic for an enhancement-type NMOS transistor in saturation J. Chen 2018/11/7

27 4.2 Channel length modulation
Pinched point moves to source terminal with the voltage vDS increased. Hence the effective channel length is reduced and channel resistance decreased  Drain current increases with the voltage vDS increased. Current drain is modified by the channel length modulation VA ——Early voltage, depending on the process technology and proportional to the channel length L. J. Chen 2018/11/7

28 4.2 Channel length modulation
MOS transistors don’t behave an ideal current source due to channel length modulation. The output resistance is finite. The output resistance is inversely proportional to the drain current. J. Chen 2018/11/7

29 4.2 Large-signal equivalent circuit model
Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS J. Chen 2018/11/7

30 4.2 Characteristics of p channel device
Circuit symbol for the p-channel enhancement-type MOSFET. Modified symbol with an arrowhead on the source lead. Simplified circuit symbol for the case where the source is connected to the body. J. Chen 2018/11/7

31 4.2 Characteristics of p channel device
The MOSFET with voltages applied and the directions of current flow indicated. The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region. J. Chen 2018/11/7

32 4.2 Characteristics of p channel device
Large-signal equivalent circuit model of the p-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS J. Chen 2018/11/7

33 4.2 The body effect In discrete circuit usually there is no body effect due to the connection between body and source terminal. In IC circuit the substrate is connected to the most negative power supply for NMOS circuit in order to maintain the pn junction reversed biased. The body effect---the body voltage can control iD Widen the depletion layer Reduce the channel depth The body effect can cause the performance degradation. J. Chen 2018/11/7

34 4.2 Temperature effects and breakdown
Drain current will decrease when the temperature increase. Breakdown Avalanche breakdown Punched-through Gate oxide breakdown J. Chen 2018/11/7

35 4.2 MOS管注意事项 MOS管栅-衬之间的电容很小,只要有少量的感应电荷就可产生很高的 电压;RGS(DC)很大,感应电荷难于释放,感应电荷所产生的高压会使很 薄的绝缘层击穿,造成管子损坏。因此,在存放、焊接和电路设计时要 多加注意,应给栅-源之间提供直流通路,避免栅极悬空。 MOS器件出厂时通常装在黑色的导电泡沫塑料袋中,切勿自行随便拿 个塑料袋装。可用细铜线把各个引脚连接在一起,或用锡纸包装。 取出的MOS器件不能在塑料板上滑动,应用金属盘来盛放待用器件。 焊接用的电烙铁必须良好接地。在焊接前应把电路板的电源线与地线短 接,待MOS器件焊接完成后再分开。 MOS器件各引脚的焊接顺序是漏极、源极、栅极。拆机时顺序相反。 电路板在装机之前,要用接地的线夹子去碰一下机器的各接线端子,再 把电路板接上去。 MOS场效应晶体管的栅极在允许条件下,最好接入保护二极管。在检 修电路时应注意查证原有的保护二极管是否损坏。 J. Chen 2018/11/7

36 4.3 MOSFET amplifier: DC analysis
Assuming device operates in saturation thus iD satisfies with iD~vGS equation. According to biasing method, write voltage loop equation. Combining above two equations and solve these equations. Usually we can get two values of vGS, only the one of two has physical meaning. Checking the value of vDS a) if vDS ≥ vGS-vt , the assuming is correct. b) if vDS ≤ vGS-vt , the assuming is not correct. Use triode region equation to solve the problem again. J. Chen 2018/11/7

37 4.3 Examples of DC analysis
The NMOS transistor is operating in the saturation region due to J. Chen 2018/11/7

38 4.3 Examples of DC analysis
Assuming the MOSFET operate in the saturation region Checking the validity of the assumption If not to be valid, solve the problem again for triode region J. Chen 2018/11/7

39 4.4 The MOSFET as an amplifier
Basic structure of the common-source amplifier Graph determining the transfer characteristic of the amplifier J. Chen 2018/11/7

40 4.4 The MOSFET as an amplifier
Transfer characteristic showing operation as an amplifier biased at point Q. Three segments: XA---the cutoff region segment AQB---the saturation region segment BC---the triode region segment vi Time vI vo J. Chen 2018/11/7

41 4.5 Biasing in MOS amplifier circuits
Voltage biasing scheme Biasing by fixing voltage (constant VGS) Biasing with feedback resistor Current-source biasing scheme Disadvantage of fixing biasing Fixing biasing may result in large ID variability due to deviation in device performance Current becomes temperature dependent Unsuitable biasing method J. Chen 2018/11/7

42 4.5 Biasing in MOS with feedback resistor
Biasing using a resistance in the source lead can reduce the variability in ID Coupling of a signal source to the gate using a capacitor CC1 J. Chen 2018/11/7

43 4.5 Biasing in MOS with current-source
Biasing the MOSFET using a constant-current source I Implementing a constant-current source using a current mirror J. Chen 2018/11/7

44 4.6 Small-signal operation and models
The ac characteristic Definition of transconductance Definition of output resistance Definition of voltage gain Small-signal model Hybrid π model T model Modeling the body effect J. Chen 2018/11/7

45 4.6 The conceptual circuit
Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier. Small signal condition J. Chen 2018/11/7

46 4.6 The small-signal models
Without the channel-length modulation effect With the channel-length modulation effect by including an output resistance —transconductance J. Chen 2018/11/7

47 4.6 The small-signal models
The T model of the MOSFET augmented with the drain-to-source resistance ro An alternative representation of the T model J. Chen 2018/11/7

48 4.6 Modeling the body effect
Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body. J. Chen 2018/11/7

49 4.7 Single-stage MOS amplifier
Characteristic parameters Three configurations Common-source configuration Common-drain configuration Common-gate configuration J. Chen 2018/11/7

50 4.7 Definitions Input resistance with no load Input resistance
Open-circuit voltage gain Voltage gain J. Chen 2018/11/7

51 4.7 Definitions Short-circuit current gain Current gain
Short-circuit transconductance gain Open-circuit overall voltage gain Overall voltage gain Output resistance J. Chen 2018/11/7

52 4.7 Relationships Voltage divided coefficient
Hence the appropriate configuration should be chosen according to the signal source and load properties, such as source resistance, load resistance, etc J. Chen 2018/11/7

53 4.7 Single-stage MOS amplifier
Three configurations Common-source configuration Common-drain configuration Common-gate configuration G D S S D S G G D CS CG CD J. Chen 2018/11/7

54 4.7 The common-source amplifier
The simplest common-source amplifier biased with constant-current source. CC1 and CC2 are coupling capacitors. CS is the bypass capacitor. J. Chen 2018/11/7

55 4.7 Equivalent circuit of the CS amplifier
AC equivalent circuit J. Chen 2018/11/7

56 4.7 Characteristics of CS amplifier
Summary of CS amplifier Very high input resistance Moderately high voltage gain Relatively high output resistance Input resistance Voltage gain Overall voltage gain Output resistance J. Chen 2018/11/7

57 4.7 The CS amplifier with a source resistance
J. Chen 2018/11/7

58 4.7 Small-signal equivalent circuit with ro neglected
Voltage gain Overall voltage gain RS takes the effect of negative feedback Gain is reduced by (1+gmRS) J. Chen 2018/11/7

59 4.7 The Common-Gate amplifier
Biasing with constant current source I Input signal vsig is applied to the source Output is taken at the drain Gate is signal grounded CC1 and CC2 are coupling capacitors J. Chen 2018/11/7

60 4.7 The CG amplifier A small-signal equivalent circuit
T model is used in preference to the π model Ro is neglecting J. Chen 2018/11/7

61 4.7 The CG amplifier fed with a current-signal input
Voltage gain Overall voltage gain J. Chen 2018/11/7

62 4.7 Summary of CG amplifier
Noninverting amplifier Low input resistance Relatively high output resistance Current follower Superior high-frequency performance J. Chen 2018/11/7

63 4.7 The common-drain or source-follower amplifier
Biasing with current source Input signal is applied to gate, output signal is taken at the source J. Chen 2018/11/7

64 4.7 The CD or source-follower amplifier
Small-signal equivalent-circuit model T model makes analysis simpler Drain is signal grounded Overall voltage gain Output resistance J. Chen 2018/11/7

65 4.7 Summary of CD or source-follow amplifier
Very high input resistance Voltage gain is less than but close to unity Relatively low output resistance Voltage buffer amplifier Power amplifier J. Chen 2018/11/7

66 4.7 Summary and comparisons
The CS amplifier is the best suited for obtaining the bulk of gain required in an amplifier. Including resistance RS in the source lead of CS amplifier provides a number of improvements in its performance. The low input resistance of CG amplifier makes it useful only in specific application. It has excellent high-frequency response. It can be used as a current buffer. Source follower finds application as a voltage buffer and as the output stage in a multistage amplifier. J. Chen 2018/11/7

67 4.8 The internal capacitance and high-frequency model
Internal capacitances The gate capacitive effect Triode region Saturation region Cutoff region Overlap capacitance The junction capacitances Source-body depletion-layer capacitance drain-body depletion-layer capacitance High-frequency model J. Chen 2018/11/7

68 4.8 The gate capacitive effect
MOSFET operates at triode region MOSFET operates at saturation region MOSFET operates at cutoff region J. Chen 2018/11/7

69 4.8 Overlap capacitance Overlap capacitance results from the fact that the source and drain diffusions extend slightly under the gate oxide. The expression for overlap capacitance Typical value This additional component should be added to Cgs and Cgd in all preceding formulas J. Chen 2018/11/7

70 4.8 The junction capacitances
Source-body depletion-layer capacitance drain-body depletion-layer capacitance J. Chen 2018/11/7

71 4.8 High-frequency model J. Chen 2018/11/7

72 4.8 High-frequency model The equivalent circuit for the case in which the source is connected to the substrate (body) The equivalent circuit model with Cdb neglected (to simplify analysis) J. Chen 2018/11/7

73 4.8 The MOSFET unity-gain frequency
Current gain Unity-gain frequency Typical frequency response Circuit determining the short-circuit current gain J. Chen 2018/11/7

74 4.11 The depletion-type MOSFET
Physical structure The structure of depletion-type MOSFET is similar to that of enhancement-type MOSFET with one important difference: the depletion-type MOSFET has a physically implanted channel There is no need to induce a channel The depletion MOSFET can be operated at both enhancement mode and depletion mode J. Chen 2018/11/7

75 4.11 Circuit symbol for the n-channel depletion-MOS
Circuit symbol for the n-channel depletion-type MOSFET Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S). J. Chen 2018/11/7

76 4.11 Characteristic curves
Expression of characteristic equation Drain current with the iD–vGS characteristic in saturation J. Chen 2018/11/7

77 4.11 The iD–vGS characteristic in saturation
Sketches of the iD–vGS characteristics for MOSFETs of enhancement and depletion types The characteristic curves intersect the vGS axis at Vt. J. Chen 2018/11/7

78 4.11 The output characteristic curves
J. Chen 2018/11/7

79 4.11 The junction FET D G D N-channel G S S Depletion layer P+
n-type Semiconductor S J. Chen 2018/11/7

80 4.11 Physical operation under vDS=0
G D S G P+ P+ P+ G S UGS = 0 UGS < 0 UGS = UGS(off) J. Chen 2018/11/7

81 4.11 The effect of UDS on ID for UGS(off) <UGS < 0
动画 J. Chen 2018/11/7

82 March 7, 2016 March 14, 2016 March 21, 2016 Homework
D4.14;4.15;4.19;D4.21; March 14, 2016 D4.36;D4.37;4.68;4.75;4.79; March 21, 2016 4.85; 4.91;4.92;4.94;4.96;4.102 J. Chen 2018/11/7


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