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Reconfigurable Ultra Low Power LNA for 2.4GHz Wireless Sensor Networks TarisT., Mabrouki A., Kraïmia H., Deval Y., Begueret J-B. Bordeaux, France.

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Presentation on theme: "Reconfigurable Ultra Low Power LNA for 2.4GHz Wireless Sensor Networks TarisT., Mabrouki A., Kraïmia H., Deval Y., Begueret J-B. Bordeaux, France."— Presentation transcript:

1 Reconfigurable Ultra Low Power LNA for 2.4GHz Wireless Sensor Networks TarisT., Mabrouki A., Kraïmia H., Deval Y., Begueret J-B. Bordeaux, France

2 2 ICECS 2010 – 13-15 Décembre – Athens, Greece  Context  RF Front End Specifications  Circuit design  Conclusion & Perspectives OUTLINE

3 3 ICECS 2010 – 13-15 Décembre – Athens, Greece  Context  RF Front End Specifications  Circuit design  Conclusion & Perspectives OUTLINE

4 4 ICECS 2010 – 13-15 Décembre – Athens, Greece Context MicroElectronic Milestones  Computers in the seventies Low cost Si technologies Digital processing  The Cellular phone in the 90’s Telecommunication network RF circuits and systems  Wireless Sensor Network & RFID in the early 21th century Gate reduction Energy (scavenging, management…)

5 5 ICECS 2010 – 13-15 Décembre – Athens, Greece Context Wireless Sensor Network Configuration …by matching the RF link budget to the communication scenario  Reduce the node power consumption… RF link 1 RF link 2 A B C Wireless Sensor Network

6 6 ICECS 2010 – 13-15 Décembre – Athens, Greece  Context  RF Front End Specifications  Circuit design  Conclusion & Perspectives OUTLINE

7 7 ICECS 2010 – 13-15 Décembre – Athens, Greece RF Front End Specifications Node Top-down  Node at system level RF Tx/Rx Power unit µControllerADCSensor Memory RF Link Budget 1 RF Link Budget 2 RFFE Demodulator  Node Rx at system level NF Rx1 NF Rx2 P Rx SNR dem NF Rx = P Rx - SNR dem +(174-10 log BW)

8 8 ICECS 2010 – 13-15 Décembre – Athens, Greece RF Front End Specifications RF Link Parameters NF Rx = P Rx – SNR dem + (174-10 log BW) P Rx P Tx node A node B distance R P Rx = P Tx - L path (R) Attenuation L(R) BFSK modulation BER~10 -3 SNR dem ~10 dB Channel Characteristic 2.4 GHz ISM Band BW = 10MHz RNF Rx P Rx L path (dB) 10 m26 dB-83 dBm90 dB 20 m13 dB-95 dBm102 dB 30 m7 dB-102 dBm109 dB

9 9 ICECS 2010 – 13-15 Décembre – Athens, Greece RF Front End Specifications RFFE and NF specification RFFE Demodulator  Node Rx at system level NF Rx1 NF Rx2 P Rx SNR dem  RFFE and system specification NF Rx is mainly supported by the LNA ! LNA LO Mixer NF Rx1 NF Rx2

10 10 ICECS 2010 – 13-15 Décembre – Athens, Greece RF Front End Specifications RFFE and NF specification RFFE Demodulator  Node Rx at system level NF Rx1 NF Rx2 P Rx SNR dem  RFFE and system specification NF Rx is mainly supported by the LNA ! LNA LO Mixer NF Rx1 NF Rx2 RNF LNA G LNA NF mixer 10 m25 dB5 dB18 dB 20 m11 dB10 dB18 dB 30 m4.5 dB14 dB18 dB

11 11 ICECS 2010 – 13-15 Décembre – Athens, Greece  Context  RF Front End Specifications  Circuit design  Conclusion & Perspectives OUTLINE

12 12 ICECS 2010 – 13-15 Décembre – Athens, Greece Circuit Design Low Power RF Metric V th ~ V th + 100mV …by maximizing the FOM LP  Optimization of RF performances versus power consumption in the transistor… RF skills Current consumption Optimized biasing!

13 13 ICECS 2010 – 13-15 Décembre – Athens, Greece Circuit Design Amplifier Configurations …active load configurations are preferred!  To compensate for the low g m in MI region… bias in out RFRF MNMN MPMP IdId in out RFRF MNMN MPMP IdId RFRF in MNMN MPMP IdId Single Transistor Stage (STS)Self Biased Inverter (SBI) OR ?

14 14 ICECS 2010 – 13-15 Décembre – Athens, Greece Circuit Design …the one of self biased inverter is the largest ! Single Transistor Stage (STS) Gain (dB) 10G 0 10 20 30 1G Frequency (Hz) 100G Self Biased Inverter (SBI)  Comparison of the Gain BandWidth (GBW) product… GBW STS GBW SBI Amplifier Configuration

15 15 ICECS 2010 – 13-15 Décembre – Athens, Greece Circuit Design LNA topology LNA 2.4GHz – CMOS 0.13µm RFRF in M1M1 M2M2 IdId V pol1 R pol1 ClCl VDD LgLg C m1 V pol2 R pol2 M3M3 C m2 C m3 L pk out VCC R in/buffer 3 0.8V C dec Current reuse with feedback buffer Digital Control 50  @ 2.4GHz LNA core Off-chip

16 16 ICECS 2010 – 13-15 Décembre – Athens, Greece Circuit Design Post Layout Performances S 21 S 11 NF 900µm 700µm

17 17 ICECS 2010 – 13-15 Décembre – Athens, Greece  Context  RF Front End Specifications  Circuit design  Conclusion & Perspectives OUTLINE

18 18 ICECS 2010 – 13-15 Décembre – Athens, Greece Conclusion & Perspectives  Match the radio performances with the RF link budget to reduce the power consumption of nodes in WSN  A matter of Noise Figure/Gain reconfiguration in the LNA  Best tradeoff between RF skills and current consumption in MI region  Select the topology providing the largest GBW System Considerations Circuit analysis RNF LNA G LNA 10 m25 dB5 dB 20 m11 dB10 dB 30 m4.5 dB14 dB PdcNF LNA G LNA 60 µW4.4 dB12.2 dB 90 µW4 dB13.1 dB 120 µW3.8 dB14.6 dB Requirement Good agreement

19 19 ICECS 2010 – 13-15 Décembre – Athens, Greece Conclusion & Perspectives DoneNext step LNA LO Mixer NF Rx1 NF Rx2  A mixer to be designed in MI region  Gilbert Cell with current bleeding topology  A VCO with low power techniques  Negative resistance topology P dc NF mixer G mixer 200 µW18 dB5-8 dB Last step P dc PN@10MHzFrequency 100 µW-80 dBc/Hz2.4 GHz

20 20 ICECS 2010 – 13-15 Décembre – Athens, Greece Thank you for your Attention


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