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Importance of the LNA Friis Formula Importance of the LNA Friis Formula Digital Electronics CMOS LNA X Low Cost High Integration Integration With Digital.

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Presentation on theme: "Importance of the LNA Friis Formula Importance of the LNA Friis Formula Digital Electronics CMOS LNA X Low Cost High Integration Integration With Digital."— Presentation transcript:

1

2 Importance of the LNA

3 Friis Formula

4 Importance of the LNA Friis Formula Digital Electronics CMOS LNA X Low Cost High Integration Integration With Digital IC Larger Parasitic Capisitance

5 Importance of the LNA Friis Formula Digital Electronics CMOS LNA X Low Cost High Integration Integration With Digital IC Larger Parasitic Capisitance RF Hexagon

6 Why Inductive Degenerated LNA? 2-Port Noise Theory

7 Why Inductive Degenerated LNA? 2-Port Noise Theory

8 Why Inductive Degenerated LNA? 2-Port Noise Theory CMOS small signal equivalent

9 Why Inductive Degenerated LNA? 2-Port Noise Theory CMOS small signal equivalent Thermal Noise Contribution

10 Why Inductive Degenerated LNA? 2-Port Noise Theory CMOS small signal equivalent Thermal Noise Contribution

11 Why Inductive Degenerated LNA? 2-Port Noise Theory CMOS small signal equivalent Thermal Noise Contribution X Power Matching

12 Inductive Degenerated LNA Bond Wire Inductance Inductive Source Degeneration Input Power Matching

13 Inductive Degenerated LNA Bond Wire Inductance Inductive Source DegenerationSmall Signal Equivalent Input Power Matching

14 Inductive Degenerated LNA Bond Wire Inductance Inductive Source DegenerationSmall Signal Equivalent Power Matching Input Power Matching

15 Inductive Degenerated LNA Bond Wire Inductance Inductive Source DegenerationSmall Signal Equivalent Power Matching Input Power Matching

16 Inductive Degenerated LNA Bond Wire Inductance Inductive Source DegenerationSmall Signal Equivalent Power Matching Input Power Matching

17 Definitions Basic Equation of MOS Drain

18 Definitions Basic Equation of MOS Drain

19 Definitions Basic Equation of MOS Drain

20 Definitions Basic Equation of MOS Drain

21 Definitions Basic Equation of MOS Drain Long Channel Short Channel

22 Inductive Specified Technique 1 st step: Setting the value of L s

23 Inductive Specified Technique 1 st step: Setting the value of L s 2 nd step: Finding the value of ω t.Ls From Impendance Matching:

24 Inductive Specified Technique 3 rd step: Finding the optimum Q s 1 st step: Setting the value of L s 2 nd step: Finding the value of ω t.Ls From Impendance Matching:

25 Inductive Specified Technique 3 rd step: Finding the optimum Q s 1 st step: Setting the value of L s 2 nd step: Finding the value of ω t.Ls 4 th step: Finding the value of L g From Impendance Matching:

26 Inductive Specified Technique 3 rd step: Finding the optimum Q s 1 st step: Setting the value of L s 2 nd step: Finding the value of ω t.Ls 4 th step: Finding the value of L g 5 th step: Finding the optimum C gs From Impendance Matching:

27 Inductive Specified Technique 6 th step: Finding the optimum devices width W opt,Ls

28 Inductive Specified Technique 6 th step: Finding the optimum devices width W opt,Ls 7 th step: Finding the optimum devices transconductance g m.opt.Ls From Impendance Matching:

29 Inductive Specified Technique 6 th step: Finding the optimum devices width W opt,Ls 7 th step: Finding the optimum devices transconductance g m.opt.Ls From Impendance Matching: 8 th step: Finding the optimum ρ and V od !

30 Inductive Specified Technique 6 th step: Finding the optimum devices width W opt,Ls 7 th step: Finding the optimum devices transconductance g m.opt.Ls From Impendance Matching: 8 th step: Finding the optimum ρ and V od ! 9 th step: Finding the current consumption I D.Ls

31 Current Specified Technique 1 st step: Setting the current consumption I D

32 Current Specified Technique 1 st step: Setting the current consumption I D 2 nd step: Finding the optimum ρ and V od

33 Current Specified Technique 1 st step: Setting the current consumption I D 2 nd step: Finding the optimum ρ and V od 3 nd step: Finding the optimum Q s From 2 nd Step:

34 Current Specified Technique 1 st step: Setting the current consumption I D 2 nd step: Finding the optimum ρ and V od 3 nd step: Finding the optimum Q s 4 th step: Finding the optimum device width W opt,I From 2 nd Step: From 3 rd Step & Impendance Matching:

35 Current Specified Technique 1 st step: Setting the current consumption I D 2 nd step: Finding the optimum ρ and V od 3 nd step: Finding the optimum Q s 4 th step: Finding the optimum device width W opt,I 5 nd step: Finding the value of ω t.I From 2 nd Step: From 3 rd Step & Impendance Matching: From 2 nd Step:

36 Current Specified Technique 6 th step: Finding the optimum device transconductance g m.opt.I From 2 nd, 3 rd Step & Impendance Matching:

37 Current Specified Technique 6 th step: Finding the optimum device transconductance g m.opt.I From 2 nd, 3 rd Step & Impendance Matching: 7 th step: Finding the optimum C gs From 5 th, 6 th Step :

38 Current Specified Technique 6 th step: Finding the optimum device transconductance g m.opt.I From 2 nd, 3 rd Step & Impendance Matching: 7 th step: Finding the optimum C gs From 5 th, 6 th Step : From 6 th, 7 th Step & Impendance Matching: 8 th step: Finding the optimum L s

39 Current Specified Technique 6 th step: Finding the optimum device transconductance g m.opt.I From 2 nd, 3 rd Step & Impendance Matching: 7 th step: Finding the optimum C gs From 5 th, 6 th Step : From 6 th, 7 th Step & Impendance Matching: 8 th step: Finding the optimum L s 9 th step: Finding the optimum L g From 6 th, 7 th Step & Impendance Matching:

40 Comparison Results Inductive Specified Technique

41 Comparison Results Inductive Specified Technique

42 Comparison Results Inductive Specified Technique Parameters:

43 Comparison 1.6 GHz V od =120mV I D = 1.7mA Inductive Specified Technique

44 Comparison Results Inductive Specified 2.5 GHz V od =120mV I D = 1.1mA

45 Comparison Results Inductive Specified 5.5 GHz V od =120mV I D = 0.5mA

46 Comparison Results Inductive Specified Technique V od 150 mV

47 Comparison Results Inductive Specified 1.6 GHz V od =138mV I D = 2.4mA

48 Comparison Results Inductive Specified 2.5 GHz V od =138mV I D = 1.5mA

49 Comparison Results Inductive Specified 5.5 GHz V od =138mV I D = 0.7mA

50 Comparison Results Inductive Specified Technique V od 150 mV

51 Comparison Results Inductive Specified 1.6 GHz V od =162mV I D = 3.2mA

52 Comparison Results Inductive Specified 2.5 GHz V od =162mV I D = 2.1mA

53 Comparison Results Inductive Specified 5.5 GHz V od =162mV I D = 0.7mA

54 Comparison Results Inductive Specified Technique V od 150 mV

55 Comparison Results Inductive Specified Technique V od 150 mV

56 Comparison Results Inductive Specified Technique V od 150 mV

57 Comparison Results Inductive Specified Technique V od 150 mV

58 Comparison Results Inductive Specified Technique V od 150 mV

59 Comparison Results Inductive Specified Technique V od 150 mV

60 Comparison Results Inductive Specified Technique L s = 1.2nH NF min = 6.1dB I D = 0.9mA

61 Comparison Results Inductive Specified Technique L s = 1nH NF min = 5.6dB I D = 1.4mA

62 Comparison Results Inductive Specified Technique L s = 0.8nH NF min = 5dB I D = 2.2mA

63 Comparison Results Inductive Specified Technique L s = 0.6nH NF min = 4dB I D = 4mA

64 Comparison Results Inductive Specified Technique NF min IDID

65 Comparison Results Inductive Specified Technique NF min IDID

66 Comparison Results Inductive Specified Technique NF min IDID

67 Comparison Results Inductive Specified Technique NF min IDID IDID LLSLS

68 Comparison Results Current Specified Technique

69 Comparison Results Current Specified Technique

70 Comparison Results Current Specified Technique Parameters:

71 Comparison Results Current Specified 1.6 GHz V od =60mVL S =3.1nH

72 Comparison Results Current Specified 2.5 GHz V od =76mVL S =2.5nH

73 Comparison Results Current Specified 5.5 GHz V od =112mVL S =1.7nH

74 Comparison Results Current Specified 1.6 GHz V od =85mVL S =2.2nH

75 Comparison Results Current Specified 2.5 GHz V od =107mVL S =1.7nH

76 Comparison Results Current Specified 5.5 GHz V od =158mVL S =1.2nH

77 Comparison Results Current Specified Technique

78 Comparison Results Current Specified Technique V od,opt 150mV3nH L S 0.5nH

79 Comparison Results Current Specified Technique NF min IDID

80 Comparison Results Current Specified Technique NF min IDID

81 Comparison Results Current Specified Technique NF min IDID IDID LLSLS

82 Conclusion Inductive Specified Technique QsQs LsLs ω t.Ls LgLg C gs W opt,Ls g m.opt.Ls ρI D.Ls

83 Conclusion Inductive Specified Technique Current Specified Technique QsQs LsLs ω t.Ls LgLg C gs W opt,Ls g m.opt.Ls ρI D.Ls QsQs IDID pLgLg C gs W opt,I g m.opt.I L S,opt,I ω t.I

84 Conclusion Inductive Specified Technique Current Specified Technique QsQs LsLs ω t.Ls LgLg C gs W opt,Ls g m.opt.Ls ρI D.Ls QsQs IDID pLgLg C gs W opt,I g m.opt.I L S,opt,I ω t.I Same Results for Same Numbers from the two techniques

85 Conclusion Inductive Specified Technique Current Specified Technique QsQs LsLs ω t.Ls LgLg C gs W opt,Ls g m.opt.Ls ρI D.Ls QsQs IDID pLgLg C gs W opt,I g m.opt.I L S,opt,I ω t.I Same Results for Same Numbers from the two techniques Noise minimization for different values than those for Power Matching X

86 Conclusion Inductive Specified Technique Current Specified Technique QsQs LsLs ω t.Ls LgLg C gs W opt,Ls g m.opt.Ls ρI D.Ls QsQs IDID pLgLg C gs W opt,I g m.opt.I L S,opt,I ω t.I Same Results for Same Numbers from the two techniques Future Work: Work for Linearity Include all the theory in a toolkit for giving Guidelines Noise minimization for different values than those for Power Matching X

87 References [1] Hashemi, H. and Hajimiri A., Concurrent multiband low-noise amplifiers-theory, design and applications, IEEE Trans. Mircrowave theory and techniques,52(1), pp.288– 301, [2] Lee, T.H. The design of CMOS Radio Frequency Integrated Circuits., Cambridge Univ. Press, Cambridge, [3] Voinigescu, S. P., Maliepaard, M.C., Showell, J.L., Babcock, G.E., Marchesan, D., Schroter, M., Schvan, P. and Harame, D.L. A scalable high-frequency noise model for bipolar transistors with application optimal transistor sizing for low-noise amplifier design, IEEE J. Solid-State Circuits,32(9), pp.1430–1439, [4] Shaeffer, D. K. and Lee, T.H., A 1.5 V, 1.5 GHz CMOS low noise amplifier, IEEE J. Solid-State Circuits,32(5),745–758,1997. [5] Andreani P. Sjöland H., Noise optimization of an inductively degenerated CMOS low noise amplifier, IEEE Trans. Circuits Syst., 48, pp.835–841, Sept

88 Thank you for you attention !


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