1. Outline Direct conversion architecture Time-varying DC offsets Solutions on offset Harmonic mixing principle FLEX pager receiver Individual receiver blocks Conclusion

2. CMOS Direct Conversion 90º I Q Simple architecture No image problem No 50ohm interfaces High integration level Low cost, low power  DC offsets  Flicker noise  LO leakage  Even-order distortion Pros Cons

3. Time-Varying DC Offsets Zero IF LO Leakage + Offset The offset originates from self-mixing. It can be as large as mV range at the mixer output. It varies with the environment and moving speed of the mobile. The offset signal bandwidth also changes with time. The maximum bandwidth can be as large as kHz range.

4. Power Narrow BandBroad Band Frequency Power Frequency Power Frequency Power Frequency Signal DC Offsets Offset-Free DC offset Time-Varying DC Offsets Flicker noise High-pass corner

5. Solutions on Offset Autozeroing or correlated double sampling AC coupling or high pass filtering Digital cancellation Double LO frequency method [ISSCC99] Adaptive dual-loop algorithm combined with the mixer [RAWCON00] Pulse-width-modulation based bipolar harmonic mixer [CICC97] Square–law based CMOS harmonic mixer [Our work: RAWCON00]

6. Harmonic Mixing Principle 2flo Conventional This work

7. Square-law Based Mixer Ideally self-mixing free. Traditional voltage controlled switches are replaced by current controlled time-varying transconductances. Current injection is used to reduce flicker noise. No noise contribution from LO stage and current source. M1M2 M3M4 LO 2 RFIF Current Voltage Coupling No

8. DC offset effect 10 10 -2 10 0 BER Eb/N0 (dB) 481216 A: 0.2 B: 0.4 C: 0.6 D: 0.8 E: 1.0 E D C B A Offset / Signal DC Offset Effect Difficulties in FLEX Pager FLEX 6400, 4FSK 0 -20 -40 -60 dB 1050-5-10 kHz Narrow band modulation Significant energy near DC High pass filtering is not viable DC offset problem Flicker noise is significant High pass effect A: Zero Offset B: 1e-7 Offset C: 2e-7 Offset CBACBA BER @ 12dB Eb/N0 High pass corner (Hz) 100020050 -2 10 Higher corner, Larger BER.

9. 4-FSK Pager Receiver Harmonic mixers are used to solve time-varying DC offset. Peak detectors are used to cancel static DC offset. High front-end gain and current injection to reduce flicker noise.

10. LNA Non-quasi-static phenomenon makes it unnecessary to do on-chip matching. Off-chip matching by a single inductor and a balun. |S11|<-20dB @ 930MHz Both on-chip and off-chip inductive loads were tried.

11. Double Balanced Mixer Improve the linearity; Provide constant impedance to LNA; Current injection provides more than 20dB flicker noise reduction.

12. Ring Oscillator It provides 45º phase shift.

13. AGC Gain: -14.5dB~18.6dB. The linear resistor R0 is used to improve the linearity. The signal level is sensed by the peak detector.

14. Static DC Offset Cancellation Peak Detector Fmin>200Hz Zero-IF 4-FSK Signal

15. LPF 5 th order elliptic gyrator-C filter Pass-band gain –6.2dB, ripple ≤ 0.5dB (≤ 9kHz) Stop-band attenuation ≥ 63dB (≥17.8kHz) Gain [dB] 0 10 20 30 Frequency [kHz] 0 -20 -80 -60 -40 -100

16. 4-FSK Demodulator Modified zero-intermediate frequency zero-crossing demodulator (ZIFZCD)

17. Clock Recovery Circuit VCO is a source-coupled multi-vibrator.

18. Measured Demodulated Signal The measured asynchronous/synchronized speed signal. The measured asynchronous/synchronized direction signal. The function of demodulator was verified.

19. Die Photo DEMOD LPFAGCMixer OSC LNA OSC Mixer Base Band Circuitry RF Front-End

20. Conclusion Feasibility of direct conversion has been demonstrated. Proposed harmonic mixing technique solves self-mixing induced DC offset problem successfully. With the help of static DC offset cancellation, the total DC offset is less than 1mV at the receiver output. The modified ZIFZCD 4-FSK demodulator functions correctly. A 4-FSK FLEX pager receiver in a single chip has been implemented.