Presentation on theme: "Amir Hossein Masnadi and Shahriar Mirabbasi IEEE NEWCAS, June 2012"— Presentation transcript:
1Amir Hossein Masnadi and Shahriar Mirabbasi IEEE NEWCAS, June 2012 An Ultra-Low-Voltage CMOS Mixer Using Switched-Transconductance Current-Reuse Dynamic-Threshold-Voltage Gain-Boosting TechniquesAmir Hossein Masnadi and Shahriar MirabbasiIEEE NEWCAS, June 2012
2Above Picture : Smart Stents, SoC and MEMS lab, UBC Big PictureDesigning Building Blocks for Ultra-Low–Voltage/Power CMOS RF Front-End for applications such as:Biomedical ApplicationAbove Picture : Smart Stents, SoC and MEMS lab, UBCLow Power Wireless Communication
3Outline Overview of Conventional Active Mixers Overview of techniques Stack Reduction, LO-Gm SeparationCurrent-ReuseDynamic ThresholdMixer DesignGm-Stage - Double Balanced Current Reuse Gilbert StructureLO -Stage - Switched Supply VoltagePost-Layout Simulation Results and ComparisonConcluding remarks
4Conventional Active Mixers Gilbert-Type Mixer (Current commutating)3 stacked transistors each transistor VDS is around VDD/3Considering Vth is around 0.4 V, minimum supply voltage is around 1.2 VTo increase conversion gain (CG) one can increase load (CGαRL×)Penalty: more voltage drop across load trade-off between VDD and CGMixer core is always ON (For Biasing the transistors)Reduce the voltage drop across the Load Resistor to increase M1 drain VoltageEven more challenging if IIP3 has to be improvedChallenge of biasing current source in saturation for low supply voltage (e.g. VDD < 1.5)Limitations for Supply-Voltage:Power Consumption issue:
5Supply Voltage (V) – Year (1997-2012) Bulk_Driven and Folded MethodsVery Low CG (1<CG<9)Roughly Reduction of V/Yeary = xRange of Threshold Voltage
6Mixer Power (mW)– Year (1997-2012) y = xRoughly a reduction of 0.88 mW/Year(it is leveling off)
7Design BottlenecksStacked Architectures : For decreasing Supply Voltage we should reduce Number of transistor Stacked stages , we have different methods , below we bring ONLY two of them :Bulk-Driven MethodLow Conversion Gain (Mostly below 10)Constant Biasing CurrentFolded Gilbert ArchitectureModerate Conversion Gain – Wide BandBulky InductorsThreshold Voltage : If decreases the headroom will increases, so it would be nice if we have lower threshold VoltageWe can't find any significant publication for reducing threshold voltage in Mixers
8Proposed Techniques for Ultra Low Voltage Mixer Reducing Stacked Transistors by Switched Transconductance:LO-Stage and Gm-Stage can be separated by switching supply voltage of Gm-StageTurn ON & Off Gm-Stage with LO Save PowerGm ON/OFF ApproachCurrent Commutating Approach
10Proposed Techniques for Ultra-Low-Voltage Mixer Choosing Gm-Stage, Maximizing Conversion Gain and Linearity:Pick a proper Gm-Stage for High Conversion Gain (High output Gm) and High Linearity Current-Reuse techniqueOveral Gm = gmn+gmpLinearity will be improvedTotal Gm=gmnTotal Gm=gmn+gmpCurrent-Reuse is similar to Push-Pull Buffer
11Switching Stage Inverter with Dynamic Threshold-Voltage: We should implement a switch between VDD and GNDDifferent Options :Simple Digital InverterHigh-speed comparator (compare LO with GND, requires low LO power)Inverter with Dynamic Threshold-Voltage:Reduce VTH of NMOS transistors by connecting inverter output to body of NMOS (DTMOS)Output voltage of the inverter with CL=1pF, PLO= −8 dBm, 2.45 GHz LO signal and DC value of LO is 0.3 V, (a) with dynamic threshold (DTMOS) inverter (b) without DTMOS..
18Techniques to improve mixer performance: Concluding RemarksTechniques to improve mixer performance:Reduce stacked levelsFor Gm-Stage , try to choose blocks with higher output Gm and LinearityReduce VTH by body effect (Dynamic Threshold Technique), Both for Gm-Stage and LO-Stage, so we can use it for increasing headroom anTurn-off circuit when you don’t want to use it to save powerTSMC 90nm ProcessRF LOVDD (V)0.3PLO (dBm)-8.4CG (dB)27-15FrequencyDC-12GHzPDC (mW)0.09 mWattIF+Active BalunIF-ResonatorBufferMixer CoreResonator
19And thank you for listening! AcknowledgmentsNSERCCMC MicrosystemsIBMTSMCAnd thank you for listening!
20ReferencesE.A.M. Klumperink, S.M. Louwsma, G.J.M. Wienk, and B. Nauta, “A CMOS switched transconductor mixer,“ IEEE Journal of Solid-State Circuits, vol.39, no.8, pp , AugHanil Lee; Mohammadi, S., “A 500μW 2.4GHz CMOS Subthreshold Mixer for Ultra Low Power Applications,“ IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, vol., no., pp , 3-5 June 2007.Kihwa Choi; Dong Hun Shin; Yue, C.P., “A 1.2-V, 5.8-mW, Ultra-Wideband Folded Mixer in 0.13-μm CMOS,“ IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, vol., no., pp , 3-5 June 2007.Assaderaghi, F.; Sinitsky, D.; Parke, S.A.; Bokor, J.; Ko, P.K.; Chenming Hu; "Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI ," Electron Devices, IEEE Transactions on , vol.44, no.3, pp , Mar 1997.V. Vidojkovic, et al., “A Low-Voltage Folded-Switching Mixer in 0.18-um CMOS, “ IEEE J. Solid-State Circuits, vol. 40, pp , June 2006. S. He and C.E. Saavedra, “An Ultra-Low-Voltage and Low-Power 2 Subharmonic Downconverter Mixer,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 2, pp , FebM. Huang, et al., "A 5.25-GHz CMOS Folded-Cascode Even-Harmonic Mixer for Low-Voltage Applications," IEEE Trans. Microwave Theory Tech., vol. 54, no. 2, pp , Feb