Comp Sci instruction encoding 10 I-type example beq $1, $2, top Immediate: distance to target op (6)rs (5)rt (5)immediate (16) ???? ????
Comp Sci instruction encoding 11 PC-relative addressing Used in branch instructions Immediate field contains distance to target – Positive: branch forward – Negative: branch backward – Range: … – Counts number of instructions, not bytes – Distance is measured from next instruction
Comp Sci instruction encoding 12 Example top:li $t0, 5 add $t0, $t0, $t1 beq $1, $2, top # distance = -3 sw$t0, x op (6)rs (5)rt (5)immediate (16)
Comp Sci instruction encoding 13 PC-relative addressing Q: Why is distance measured from next instruction? A: Fetch-Decode-Execute cycle – Fetch instruction & increment PC (add 4) – Decode instruction: get operands – Execute instruction: compute result, load or store Branch target = PC + 4 * distance
Comp Sci instruction encoding 16 Assembly language pseudo-instructions lw $t0, x# address=0x Machine language encoding? 1. Address of x takes up 32 bits – how do we keep it in lw instruction? 2. I-type instruction Immediate field only 16 bits. How do we represent 32 bit immediate field Problem?
Comp Sci instruction encoding 18 Use of lui and base register lw $t0, x# address=0x lui $at, 0x1001 lw $t0, 0x0010($at) $at = "assembler temporary" Used to implement pseudo-instructions
Comp Sci instruction encoding 19 Another lw problem – index addressing lw $t0, x($t1) # address of x # = 0x Problem? Requirement: x($t1)= address of x + contents of $t1. Problem: (32 bits) (32 bits) Solution: lui $at, 0x1001 add $at, $at, $t1 lw $t0, 0x0010($at)
Comp Sci instruction encoding 20 Load immediate pseudo-instruction li $t0, 0x Problem? Solution: lui $at, 0x1234 ori $t0, $at, 0x5678
Comp Sci instruction encoding 21 Load immediate w/ small constant li $t0, 5 ori $t0, $0, 5 Only one instruction needed Constant fits into 16-bit immediate field RISC design principle: "make the common case fast"