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Chapter 2 Instructions: Language of the Computer Part III.

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Presentation on theme: "Chapter 2 Instructions: Language of the Computer Part III."— Presentation transcript:

1 Chapter 2 Instructions: Language of the Computer Part III

2 Florida A & M University - Department of Computer and Information Sciences Representing Instructions Instructions are encoded as binary strings Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats Arithmetic Data transfer Immediate Regularity!

3 Big Picture: Stored-Program Instructions represented as binary numbers, just like data Programs are stored in memory and can be read or written to just like data SW/HW simplification Memory technology for data used for programs Programs can manipulate other programs (e.g. compiler)

4 Stored-Program Consequences Instructions and data have a memory address Program Counter (PC) : register that keeps address of instruction being executed Hardware pointer to memory Intel calls it Instruction Address Pointer Binary compatibility Compiled programs can be executed on different computers Standardized ISAs

5 Instruction as Numbers Simplicity Instruction will be 32-bit word just like data Word is divided into fields Different instructions may need different field lengths 5-bit field can only represent 0-31 larger values needed (e.g. immediate for addi) Design Principle: Good design demands good compromises Multiple formats complicate decoding, but allow 32-bit instructions uniformly Keep formats as similar as possible

6 MIPS Instruction Formats R-format : used for arithmetic instructions that have only register operands I-format : used for data transfer instructions and arithmetic instructions that have a constant operand J-format: used for j and jal (later)

7 Florida A & M University - Department of Computer and Information Sciences MIPS R-format Instructions Instruction fields op: operation code rs: first source register number rt: second source register number rd: destination register number shamt: shift amount (00000 for now) funct: function code (extends op field) oprsrtrdshamtfunct 6 bits 5 bits

8 MIPS R-format Instructions Each field is viewed as a 5-bit or 6-bit unsigned integer, not as part of a 32-bit integer Consequence: 5-bit fields can represent integers 0-31 and 6-bit fields can represent integers 0-63 op: partially specifies what instruction it is Note: This field is for all R-format instructions

9 MIPS R-format Instructions rs (Source Register): generally denotes register containing first operand rt (Target Register): generally denotes register containing second operand (note that name is misleading) rd (Destination Register): generally denotes register which will receive result of computation Exceptions: mult and div have nothing important in the rd field since the destination registers are hi and lo mfhi and mflo have nothing important in the rs and rt fields since the source is determined by the instruction

10 MIPS R-format Instructions shamt: the amount a shift instruction will shift by. Shifting a 32-bit word by more than 31 is useless, so this field is only 5 bits. This field is for all except the shift instructions funct: combined with op, this number exactly specifies the instruction

11 MIPS R-format Instructions Instructionoprsrtrdshamtfunct add sub Decimal values Green insert in textbook is a good resource

12 R-format Example MIPS Instruction: add $t0,$t1,$t2 op = 0 funct = 32 rs = 9 (first operand - $t1) rt = 10 (second operand - $t2) rd = 8 (destination - $t0) shamt = 0 (not a shift)

13 Florida A & M University - Department of Computer and Information Sciences R-format Example add $t0, $s1, $s2 special$s1$s2$t00add = oprsrtrdshamtfunct 6 bits 5 bits

14 R-format Example Find the machine language instruction for the following C++ statement: a = b – d; Recall: # $s0 is a, $s1 is b, $s3 is d sub $s0, $s1, $s3#a = b – d What is hexadecimal representation?

15 Florida A & M University - Department of Computer and Information Sciences MIPS I-format Instructions Immediate arithmetic and load/store instructions rt: destination or source register number constant: –2 15 to – 1 address: offset added to base address in rs Key Concept: Only one field is inconsistent with R- format. Most importantly, op is still in same location. oprsrtconstant or address 6 bits5 bits 16 bits

16 I-format Instructions op: same as R-format except that since there is no funct field, op uniquely specifies an I-format instruction This answers earlier question :Why aren’t op and funct a single 12-bit field? Consistent with other formats Tells hardware whether to treat the last 16 bits of instruction as three separate fields (R-format) or one field (I-format) rs (Source Register): register containing an operand

17 MIPS I-format Instructions Instructionoprsrtconstant/address addi80-31 within ± 2 15 lw within ± 2 15 sw within ± 2 15


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