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Published byJalynn Kendall Modified about 1 year ago

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Bias Voltage Generation

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Use Cascode to Increase output Resistance Rout is approximately g m3 r o3 r o2 L1=L2, but L3 need not equal to L2. Design Criteria: Choose V b so that V Y and V X. Question: How do you generate Vb ?

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Cascode Current Source Requirement: Choose Vb so that V X =V Y V N =V GS0 +V X =V GS3 +V Y Therefore, V GS3 =V GS0 Since I D1 =I D2, (W/L) 3 =(W/L) 0

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Cascode Current Mirror VDS1=249.6 mV VDS6=263.7 mV VDS5=0.675 V VDS0=0.286 V IDS5=20.41uA IDS0=10 uA gmovergds_5=47 gds6=10.35uS Rout=4.5 MOhms (Mismatch) (Close)

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Sensitivity of IOUT due to VOUT As VX decreases from VDD, M3 enters the triode region first. M2 enters the triode region

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Sweep Output Voltage VTH5=177.6 mV VG5=535.7 mV VG6=249.6 mV VTH6=136.9 mV

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VB Versus VX VTH5=177.6 mV VG5=535.7 mV VG5-VTH5=535.7 mV mV=358.1 mV T5=SAT T6=SAT T5=Triode T6=SAT VG6=249.6 mV VTH6=136.9 mV VG6-VTH6= mV mV=112.7 mV VB=112.7 mV →T6=Triode

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T5=SAT T6=SAT T5=Triode T6=SAT T5=Triode T6=Triode

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Accuracy and Voltage Headroom Trade-Off Vb is chosen to allow minimum VP. Problem: VX is not equal to VY Iout is not equal to Iref. Vb is chosen to allow VX=VY VP is not minimum. But Iout is equal to Iref.

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Design Criteria Desirables: – I OUT should be I REF. (i.e. V X =V Y ) – V out should be minimized. (i.e. V OD2 +V OD3 ) V OUT =V OD3 +V OD4 V A =V B →I OUT =mI REF IREF produces VGS1 and VGS3. If VA is to be defined by Vb, then VD1 must not be connected to VG1, otherwise, it becomes unclear which node defines VA.

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Extra Slides

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Low Voltage Cascode To keep M2 in saturation: V x >V b -V th →V x +V th2 >V b To keep M1 in saturation: V A >V x -V th1 Since V A =V b -V GS2, V b >V x -V th1 +V GS2 Design criteria for M2

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Vb Requirement Vb=VOD3+VGS4 to produce a minimum output Voltage of VOD3 and VOD4. By design, VGS4=VGS2, VA=VB Vb=V OD2 +V TH2 +V OD1.

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Minimum Vout

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VOD3=0.163 V VOD4=0.056 V VOUT(min)=VOD3+VOD4=0.219 V

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Vb Generation (Option 1) Requirement: Vb=V OD2 +V TH2 +V OD1 V GS5 =V GS2 V OD1 =V GS6 -I 1 R b Problem: M5 suffers from no body effect M2 suffers from body effect Rb is not well controlled, unless Rb is off-chip.

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Vb Generation (Option 2) Requirement: Vb=V OD2 +V TH2 +V OD1 V GS5 =V GS2 V OD1 =V GS6 -V TH7 Problem: M5 suffers from no body effect M2 suffers from body effect Design M7 (Large W 7 /L 7 ) so that VGS7 is approx. VTH7 Need to have sufficiently large VGS6, otherwise M6=triode since M7=Sat.

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Vb Generation Circuit

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Iout versus Vout

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