1. Low Noise Amplifier

2. DSB/SC-AM Modulation (Review)

3. Frequency Shift Property (Review)

4. Frequency Spectrum of DSB/SC- AM Signal (Review)

5. If the Receiver Uses a Different Frequency to Demodulate (Keep by using with LPF)

6. Use an LNA Circuit to Reduce Noise (11/20) (11/27) (12/4)

7. Design of a Low Noise Amplifier 1. Transistor Biasing 2. Add L1 (Ls) and Lg 3. Add Ls 4. Adjust Lg 5. Generate gate bias voltage 6. Add M2 7. Design the output resonant network 8. Reduce the quality of output tank!

8. Design of a Low Noise Amplifier Source Resistance (R S ) is 50 Ω Assume a bias current of 1 mA Assumed: g m /I D =20 mS/mA

9. Determine M1 Initial assumptions: 1.VDS1=0.3 V 2.VSB=0 V (DC) 3.g m /I D =20 mS/mA 4.I D =1 mA

10. g m /I D Calculation

11. Device Simulation

12. Add L 1 & L g

13. Impedance Measurement Our initial L1 and Lg does not produce a perfect match!

14. Increase Ls to Increase Real Impedance (Increase L s (or L 1 ) to compensate For C GD )

15. (Ls=270 pH) (Ls=398 pH) (The resonant frequency is still off!)

16. Adjust Lg (fix at 3.5 GHz ) (Reduce Lg to increase the resonant freq)

17. Generate the Gate Voltage The resistor RB and CB isolate the signal path from the noise of IB and MB. Generate VGS of M1 (449.8 mV) Insulate the DC

18. Find the width of MB

19. Determine RB RB must be much larger than RP, the parallel equivalent resistance Of R S. Otherwise, RB will load the input match network!

20. Input Bias Network!

21. Lg=14.85 nH, Ls=398 pH After adding the bias MB Before adding the bias MB

22. Determine M2 (Choose M2 to be Identical to M1, for simplicity) Also connect the gate of M2 to VDD.

23. Determine the Output Impedance Use large L to provide DC bias and open at 3.5 GHz. Use an artificially large C to provide DC isolation and a short at 3.5 GHz. Use the port to calculate the S22 and output impedance.

24. Output Admittance Goal: to cancel the imaginary admittance with an inductor! An effective output capacitance of 135 fF An effective output resistance of 1/1.107mS=900 Ohms Since we know fo, and Ceff, we can calculate Leff: 15.3 nH

25. Adding Output Capacitance A 15.3 nH inductor is too large to implement on silicon. We will add a 1 pF capacitor in parallel to reduce the required inductance to 1.82 nH

26. Schematic (A port is used to calculate the output impedance) 903~1/1.107 mS

27. Comparison of Smith Chart After adding the bias MB After the output load The input resonant frequency also shifted. Location of S11 @ 3.5 GHz!

28. Input Resonant Frequency Shifted to 3.15 GHz We probably have to reduce Lg.

29. Real and Imaginary Part of Output Impedance

30. Adjust Lg to Move the Resonant Frequency to 3. 5GHz

31. S11 Using Lg of 10 nH

32. Input S11 Reflection coefficient larger than 1! May have to adjust reduce the quality factor of the output tank!

33. Adjust Output Resistance

34. R L of 900 Ω

35. Transient Simulation

36. Trasient Simulation Vout=1.225-1.1745=50.5 mV Vin=441.637-439.96=1.67 mV Av=30.23, 29.60 dB

37. Misc.

38. Determine Parameters Using Matlab

39. DC Bias Simulation Purpose: Verify g m /I D DC parameters through simulation.

40. Design of a Low Noise Amplifier Source Resistance (R S ) is 50 Ω Assume a bias current of 1 mA Assumed: g m /I D =20 mS/mA