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MOS Current Mirror Section 9.2 J. Ou

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A Simple Current Mirror

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Example 1

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Example #2

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Trade-Offs in Current Mirror Design Output resistance (1/gds) CDS W/L Current

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I OUT =100 uA L(um)W(um)GDS (uS)CDS (fF) 2109.6351.82100.39 800n47.456.517.13 180n17.0292.91.079 120n13.331470.411 For Same IOUT, L↓→W↓→GDS↑(Ro↓) →CDS ↓ Drop in Ro is not desired.

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Use Cascode to Increase output Resistance Rout is approximately g m3 r o3 r o2 L1=L2, but L3 need not equal to L2. Design Criteria: Choose V b so that V Y and V X. We will learn how to generate Vb in the next class.

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Design Example VDS of T4 is not matched to VDS of T5. T4 has VDS of 999.1 mV. How come? Answer: VSD=0.2 was used as design criteria for T0 and T2. We need a transistor to absorb the difference between VDS of T4 (which is 0.6 V) and VSD of T2 (which is 0.2V) Bias I: 100 nA

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Add More VGS to Minimize Difference in VDS VDS5=161.2 mV gives 50 nA VDS4 is 155.7 mV, provides 49.82nA.

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Need for a Cascode T1 is designed to have a VSD of 0.4, leading to Vout=0.6 V. T3 is designed to have VDS of 200 mV, but it must sustain Vout=0.6 V. So we need to add a transistor to absorb the difference in V.

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Property Bias Output Voltage

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Large Output Resistance

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Small Signal Gain

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Lecture 2 Current Mirror(1). Simple Current Mirror.

Lecture 2 Current Mirror(1). Simple Current Mirror.

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