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Chapter 11 Practical Considerations for Digital Design William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education,

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Presentation on theme: "Chapter 11 Practical Considerations for Digital Design William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education,"— Presentation transcript:

1 Chapter 11 Practical Considerations for Digital Design William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

2 Flip-Flop Time Parameters Race condition –See Figure 11-1 Data Manual –ac waveforms illustrate measuring points –See Figure 11-2 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

3 Figure 11-1 Figure 11-2 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

4 Flip-Flop Time Parameters Setup time –prior to active clock edge –t s (L) and t s (H) Hold time –t h (L) and t h (H) –See Figure 11-3 Propagation delay –delay from input to output William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

5 Figure 11-3 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

6 Flip-Flop Time Parameters Manufacturer’s Data Manual –maximum frequency (f max ) –clock pulse width [t w (L)] and [t w (H)] –set or reset pulse width [t w (L)] Metastable state –output voltage at an invalid level Delay gate ICs to provide delay William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

7 Automatic Reset To automatically reset at power-up Use RC circuit See Figure 11-26 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

8 Figure 11-26 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

9 Schmitt Trigger ICs Positive feedback to speed up level transitions Hysteresis –switching thresholds of positive and negative-going signals are different –useful to ignore small amounts of jitter –See Figure 11-27 Transfer Function –See Figure 11-28 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

10 Figure 11-27 Figure 11-28 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

11 Switch Debouncing Switch bounce when a mechanical switch is opened or closed –See Figure 11-38 J-K Flip-Flop method –See Figure 11-37 Schmitt method –See Figure 11-39 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

12 Figure 11-38 Figure 11-37 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

13 Figure 11-39 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

14 Switch Debouncing Cross-NAND method –See Figure 11-40 D flip-flop method –See Figure 11-41 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

15 Figure 11-40 Figure 11-41 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

16 Sizing Pull-Up Resistors Used to prevent floating –avoid high power consumption –10 K ohm resistor works fine Pull-down resistor –to keep terminal LOW –100 ohm resistor works fine William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

17 Practical Input and Output Considerations 5 V Power Supply –78XX series integrated circuit voltage regulators –ac-to-dc rectifier circuit –ripple-free output –See Figure 11-43 60 Hz clock –zener diode –See Figure 11-44 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

18 Figure 11-43 Figure 11-44 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

19 Practical Input and Output Considerations Driving Light-Emitting Diodes –provide current by sinking when output is LOW –330 ohm resistor to limit current –See Figure 11-46 Connecting multiple I/O to a CPLD or FPGA –see figure 11-47 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

20 Practical Input and Output Considerations Phototransistor Input to a Latching Alarm –See Figure 11-48 Using an Optocoupler for Level Shifting –See Figure 11-49 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

21 Figure 11-46 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

22 Figure 11-47 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

23 Figure 11-48 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

24 Figure 11-49 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

25 Practical Input and Output Considerations Power MOSFET to Drive a Relay –See Figure 11-50 Level Detecting with Analog Comparator –LM339 –See Figure 11-51 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

26 Figure 11-50 Figure 11-51 William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

27 Summary Unpredictable results on IC logic can occur if strict timing requirements are not met. A setup time is required to ensure that the input data to a logic circuit is present some defined time prior to the active clock edge. A hold time is required to ensure that the input data to a logic circuit is held for some definite time after the active clock edge. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

28 Summary The propagation delay is the length of time it takes for the output of a logic circuit to respond to an input stimulus. Delay gates are available to purposely introduce time delays when required. The charging voltage on a capacitor in a series RC circuit can be used to create a short delay for a power-up reset. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

29 Summary The two key features of Schmitt trigger ICs are that they output extremely sharp edges and they have two distinct input threshold voltages. The difference between the threshold voltages is called the hysteresis voltage. Mechanical switches exhibit a phenomenon called switch bounce, which can cause problems in most kinds of logic circuits. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

30 Summary Pull-up resistors are required to make a normally floating input act like a HIGH. Pull-down resistors are required to make a normally floating input act like a LOW. A practical, inexpensive 5 V power supply can be made with just a transformer, four diodes, some capacitors, and a voltage regulator. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

31 Summary A 60-pulse-per-second clock oscillator can be made using the power supply’s transformer and a few additional components. The resistance from collector to emitter of a phototransistor changes from about 10 M ohm down to about 1000 ohm when light shines on its base region. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

32 Summary An optocoupler provides electrical isolation from one part of a circuit to another. Power MOSFETs are commonly used to increase the output drive capability of IC logic from less than 100 mA to more than 1A. William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.


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