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NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 1 Semiconductor Manufacturing Technology: Semiconductor.

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Presentation on theme: "NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 1 Semiconductor Manufacturing Technology: Semiconductor."— Presentation transcript:

1 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 1 Semiconductor Manufacturing Technology: Semiconductor Manufacturing Processes Conrad T. Sorenson Praxair, Inc Arizona Board of Regents for The University of Arizona NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing

2 Sorenson 2 Semiconductor Manufacturing Processes Design Wafer Preparation Front-end Processes Photolithography Etch Cleaning Thin Films Ion Implantation Planarization Test and Assembly Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation

3 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 3 Design Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Establish Design Rules Circuit Element Design Interconnect Routing Device Simulation Pattern Preparation

4 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 4 Pattern Preparation Reticle Chrome Pattern Quartz Substrate Pellicle

5 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 5 Wafer Preparation Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Polysilicon Refining Crystal Pulling Wafer Slicing & Polishing Epitaxial Silicon Deposition

6 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 6 Polysilicon Refining Chemical Reactions Silicon Refining: SiO C Si + 2 CO Silicon Purification: Si + 3 HCl HSiCl 3 + H 2 Silicon Deposition: HSiCl 3 + H 2 Si + 3 HCl Reactants H 2 Silicon Intermediates H 2 SiCl 2 HSiCl 3

7 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 7 Crystal Pulling Quartz Tube Rotating Chuck Seed Crystal Growing Crystal (boule) RF or Resistance Heating Coils Molten Silicon (Melt) Crucible Materials Polysilicon Nodules * Ar * H 2 * High proportion of the total product use Process Conditions Flow Rate: 20 to 50 liters/min Time: 18 to 24 hours Temperature: >1,300 degrees C Pressure: 20 Torr

8 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 8 3/15/98PRAX01C.PPT Rev. 1.0 Wafer Slicing & Polishing The silicon ingot is sliced into individual wafers, polished, and cleaned. silicon wafer p+ silicon substrate

9 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 9 Epitaxial Silicon Deposition Gas Input Lamp Module Quartz Lamps Wafers Susceptor Exhaust * High proportion of the total product use Chemical Reactions Silicon Deposition: HSiCl 3 + H 2 Si + 3 HCl Process Conditions Flow Rates: 5 to 50 liters/min Temperature: 900 to 1,100 degrees C. Pressure: 100 Torr to Atmospheric silicon wafer p- silicon epi layer p+ silicon substrate Dopants AsH 3 B 2 H 6 PH 3 Etchant HCl Carriers Ar H 2 * N 2 Silicon Sources SiH 4 H 2 SiCl 2 HSiCl 3 * SiCl 4 *

10 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 10 Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Thermal Oxidation Silicon Nitride Deposition -Low Pressure Chemical Vapor Deposition (LPCVD) Polysilicon Deposition -Low Pressure Chemical Vapor Deposition (LPCVD) Annealing Front-End Processes

11 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 11 Front-End Processes * High proportion of the total product use Polysilicon H 2 N 2 SiH 4 * AsH 3 B 2 H 6 PH 3 Exhaust Via Vacuum Pumps and Scrubber 3 Zone Temperature Control Gas Inlet Vertical LPCVD Furnace Quartz Tube Chemical Reactions Thermal Oxidation: Si + O 2 SiO 2 Nitride Deposition: 3 SiH NH 3 Si 3 N H 2 Polysilicon Deposition: SiH 4 Si + 2 H 2 Process Conditions (Silicon Nitride LPCVD) Flow Rates: sccm Temperature: 600 degrees C. Pressure: 100 mTorr Nitride NH 3 * H 2 SiCl 2 * N 2 SiH 4 * SiCl 4 Oxidation Ar N 2 H 2 O Cl 2 H 2 HCl * O 2 * Dichloroethene * Annealing Ar He H 2 N 2

12 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 12 Photolithography Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Photoresist Coating Processes Exposure Processes

13 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 13 Photoresist Coating Processes p- epi p+ substrate field oxide photoresist Photoresists Negative Photoresist * Positive Photoresist * Other Ancillary Materials (Liquids) Edge Bead Removers * Anti-Reflective Coatings * Adhesion Promoters/Primers (HMDS) * Rinsers/Thinners/Corrosion Inhibitors * Contrast Enhancement Materials * Developers TMAH * Specialty Developers * Inert Gases Ar N 2

14 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 14 Exposure Processes p- epi p+ substrate field oxide photoresist Expose Kr + F 2 (gas) * Inert Gases N 2

15 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 15 Ion Implantation Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Well Implants Channel Implants Source/Drain Implants

16 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 16 Ion Implantation 180 kV Resolving Aperture Ion Source Equipment Ground Acceleration Tube 90° Analyzing Magnet Terminal Ground 20 kV FocusNeutral beam and beam path gated Beam trap and gate plate Wafer in wafer process chamber X - axis scanner Y - axis scanner Neutral beam trap and beam gate Gases Ar AsH 3 B 11 F 3 * He N 2 PH 3 SiH 4 SiF 4 GeH 4 Solids Ga In Sb Liquids Al(CH 3 ) 3 * High proportion of the total product use junction depth Process Conditions Flow Rate: 5 sccm Pressure: Torr Accelerating Voltage: 5 to 200 keV

17 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 17 Etch Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Conductor Etch -Poly Etch and Silicon Trench Etch -Metal Etch Dielectric Etch

18 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 18 Conductor Etch * High proportion of the total product use Etch Chambers Cluster Tool Configuration Transfer Chamber Loadlock Wafers RIE Chamber Transfer Chamber Gas Inlet Exhaust RF Power Wafer Polysilicon Etches HBr * C 2 F 6 SF 6 * NF 3 * O 2 Aluminum Etches BCl 3 * Cl 2 Diluents Ar He N 2 Chemical Reactions Silicon Etch: Si + 4 HBr SiBr H 2 Aluminum Etch: Al + 2 Cl 2 AlCl 4 Process Conditions Flow Rates: 100 to 300 sccm Pressure: 10 to 500 mTorr RF Power: 50 to 100 Watts

19 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 19 Dielectric Etch * High proportion of the total product use Etch Chambers Cluster Tool Configuration Transfer Chamber Loadlock Wafers RIE Chamber Transfer Chamber Gas Inlet Exhaust RF Power Wafer Contact locations Chemical Reactions Oxide Etch: SiO 2 + C 2 F 6 SiF 4 + CO 2 + CF CO Process Conditions Flow Rates: 10 to 300 sccm Pressure: 5 to 10 mTorr RF Power: 100 to 200 Watts Plasma Dielectric Etches CHF 3 * CF 4 C 2 F 6 C 3 F 8 CO * Diluents Ar He N 2 CO 2 O 2 SF 6 SiF 4

20 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 20 Cleaning Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Critical Cleaning Photoresist Strips Pre-Deposition Cleans

21 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 21 Critical Cleaning Contact locations RCA Clean SC1 Clean (H 2 O + NH 4 OH + H 2 O 2 ) * * SC2 Clean (H 2 O + HCl + H 2 O 2 ) * Piranha Strip * H 2 SO 4 + H 2 O 2 * Nitride Strip H 3 PO 4 * Oxide Strip HF + H 2 O * Solvent Cleans NMP Proprietary Amines (liquid) Dry Cleans HF O 2 Plasma Alcohol + O 3 Dry Strip N 2 O O 2 CF 4 + O 2 O 3 Process Conditions Temperature: Piranha Strip is 180 degrees C.

22 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 22 Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Chemical Vapor Deposition (CVD) Dielectric CVD Tungsten Physical Vapor Deposition (PVD) Chamber Cleaning

23 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 23 Chemical Vapor Deposition (CVD) Dielectric * High proportion of the total product use CVD Dielectric O 2 O 3 TEOS * TMP * TEOS Source LPCVD Chamber Transfer Chamber Gas Inlet Exhaust RF Power Wafer Metering Pump Inert Mixing Gas Process Gas Vaporizer Direct Liquid Injection Chemical Reactions Si(OC 2 H 5 ) O 3 SiO CO + 3 CO H 2 O Process Conditions (ILD) Flow Rate: 100 to 300 sccm Pressure: 50 Torr to Atmospheric

24 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 24 Chemical Vapor Deposition (CVD) Tungsten * High proportion of the total product use CVD Dielectric WF 6 * Ar H 2 N 2 Output Cassette Input Cassette Wafer Hander Wafers Water-cooled Showerheads Multistation Sequential Deposition Chamber Resistively Heated Pedestal Chemical Reactions WF H 2 W + 6 HF Process Conditions Flow Rate: 100 to 300 sccm Pressure: 100 mTorr Temperature: 400 degrees C.

25 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 25 Physical Vapor Deposition (PVD) Barrier Metals SiH 4 Ar N 2 Ti PVD Targets * Physical Vapor Deposition Chambers Cluster Tool Configuration Transfer Chamber Loadlock Wafers PVD Chamber Transfer Chamber Cryo Pump Wafer NSN + e - Backside He Cooling Argon & Nitrogen Reactive Gases DC Power Supply (+) * High proportion of the total product use Process Conditions Pressure: < 5 mTorr Temperature: 200 degrees C. RF Power:

26 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 26 Chamber Cleaning * High proportion of the total product use Chamber Cleaning C 2 F 6 * NF 3 ClF 3 Water-cooled Showerheads Multistation Sequential Deposition Chamber Resistively Heated Pedestal Chemical Reactions Oxide Etch: SiO 2 + C 2 F 6 SiF 4 + CO 2 + CF CO Process Conditions Flow Rates: 10 to 300 sccm Pressure: 10 to 100 mTorr RF Power: 100 to 200 Watts Aluminum Surface Coating Process Material Residue Chamber Wall Cross-Section

27 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 27 Planarization Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Oxide Planarization Metal Planarization

28 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 28 Chemical Mechanical Planarization (CMP) * High proportion of the total product use. Platen Polishing Head Pad Conditioner Carousel Head Sweep Slide Load/Unload Station Wafer Handling Robot & I/O Polishing Pad Slurry Delivery Platen Wafer Carrier Wafer Backing (Carrier) Film Polyurethane Pad Polyurethane Pad Conditioner Abrasive CMP (Oxide) Silica Slurry KOH * NH 4 OH H 2 O CMP (Metal) Alumina * FeNO 3 Process Conditions (Oxide) Flow: 250 to 1000 ml/min Particle Size: 100 to 250 nm Concentration: 10 to 15%, 10.5 to 11.3 pH Process Conditions (Metal) Flow: 50 to 100 ml/min Particle Size: 180 to 280 nm Concentration: 3 to 7%, pH *

29 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 29 Test and Assembly Thin Films Photo- lithography Cleaning Front-End Processes Etch Ion Implantation Planarization Test & Assembly Design Wafer Preparation Electrical Test Probe Die Cut and Assembly Die Attach and Wire Bonding Final Test

30 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 30 Electrical Test Probe Defective IC Individual integrated circuits are tested to distinguish good die from bad ones.

31 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 31 Die Cut and Assembly Good chips are attached to a lead frame package.

32 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 32 Die Attach and Wire Bonding lead frame gold wire bonding pad connecting pin

33 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 33 Final Test Chips are electrically tested under varying environmental conditions.

34 NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing Sorenson 34 References 1.CMOS Process Flow in Wafer Fab, Semiconductor Manufacturing Technology, DRAFT, Austin Community College, January 2, Semiconductor Processing with MKS Instruments, Inc. 3.Worthington, Eric. New CMP architecture addresses key process issues, Solid State Technology, January Leskonic, Sharon. Overview of CMP Processing, SEMATECH Presentation, Gwozdz, Peter. Semiconductor Processing Technology SEMI, CVD Tungsten, Novellus Sales Brochure, 7/96. 7.Fullman Company website. Fullman Company - The Semiconductor Manufacturing Process, Barrett, Craig R. From Sand to Silicon: Manufacturing an Integrated Circuit, Scientific American Special Issue: The Solid State Century, January 22, 1998.


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