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FABRICATION PROCESSES Presentation on ‘FABRICATION PROCESSES’ Course no : EEE 453 Course by : Mohiuddin Munna.

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Presentation on theme: "FABRICATION PROCESSES Presentation on ‘FABRICATION PROCESSES’ Course no : EEE 453 Course by : Mohiuddin Munna."— Presentation transcript:

1 FABRICATION PROCESSES Presentation on ‘FABRICATION PROCESSES’ Course no : EEE 453 Course by : Mohiuddin Munna

2 Before Starting the Fabrication It starts with making silicon

3 Before Starting the Fabrication Ingots get cut into wafers, which are 1-2mm thick, and upto 12” in diameter Entire wafers are processed, and then cut into chips when needed

4 Fabrication Processes Six main process steps 1. Oxidation 2. Diffusion 3. Ion implantation 4. Lithography 5. Thin film deposition 6. Epitaxy

5 Oxidation the first step in semiconductor device fabrication involves the oxidation of the wafer surface in order to grow a thin layer of silicon dioxide (SiO 2 ). This oxide is used to provide insulating and passivation layers. The most common method of oxidation is thermal, and can be classified as either "dry" or "wet" oxidation. Wafers are loaded into quartz boats and slid into a furnace heated to approximately 1200ºC.

6 Oxidation In dry oxidation, thin oxide layers are grown in an environment containing oxygen and hydrogen chloride near atmospheric pressure

7 Oxidation Thicker oxide layers require higher pressures and the use of steam (wet oxidation). Wet oxidation is performed by exposing the wafer to a mixture of oxygen and hydrogen in the furnace chamber. Water vapor is formed when the hydrogen and oxygen react

8 Oxidation Process (Schematic)

9 Oxidation Process Standard oxidation temperature 800-1200 C Heat is produced by resistance heating Coil like heating elements are arranged in 3 controlled zone Outer zones operates at higher power to compensate heat loss Simply Oxygen is fed for dry oxidation Carrier gas like Ar on N 2 is used in wet oxidation along with heated water or burning O 2 and H 2 at input of tube Required time in furnace depends on temperature and desired thickness Whole system is automated

10 Oxidation Process Fig: Typical Thickness Vs Oxidation time for 100 crystal compared for dry and wet oxidation

11 Diffusion process Process of doping Si wafer is exposed to solid, liquid or gaseous source containing desired impurity A reaction at wafer surface establishes a supply of dopant atoms immediately adjacent to Si crystal At elevated temperature atoms difuse in the region Si is not protected by oxide Surface doping concentration is up to 10 21 / cm 3 Diffusion in SiO 2 is relatively low SiO 2 protects Si for a limited time depending on oxide thickness,temperature and background droping.

12 Diffusion process

13 Diffusion process (Schematic)

14 Ion Implantation It’s an alternative process of introducing dopants Dopant ion is accelerated in high energy range from 5 keV to 1MeV then shooted into semiconductor Ions displace Si atoms along their path into crystal follow-up heating binds ions with crystel But before that automatic scanning is performed automatically to determine total number of ions / cm 3 Si wafer can be masked using thin flims of SiO2,Si3N4 and photoresist.

15 Ion Implantation (schematic)

16 Advantage of Ion Implantation Lower temperature process Implantation is performed in room temperature Follow-up heating is done in 600 C Gives precise control over impurity Ideally suited for a number of modern device structures requiring extremely shallow junctions damage from implantation can be annealed by heating the wafer in a furnace to T > 900 C.

17 Doping by Ion Implantation Dose = ion beam flux (# cm -2 s -1 ) x time for implant... units # cm -2

18 Doping by Ion Implantation SiO 2 film masks the implant by preventing ions from reaching the underlying silicon (assuming it’s thick enough) after implantation, the phosphorus ions are confined to a damaged region near the silicon surface

19 Doping by Ion Implantation Annealing heals damage and also redistributes the ions (they diffuse further into the silicon crystal)

20 Doping by Ion Implantation Fig: Computed phosphorus Implantation profile assuming a constant dose of 10 14 /cm

21 Lithography Process of selectively removing SiO 2 and other masking material covering wafer surface. Transfers circuit diagram on wafer

22 Lithography Process At first Si wafer is coated with UV light sensitive photoresist in a thin uniform coating. Wafer is pre baked at 80-100 C Exposing wafer to UV light through a mask Mask here is carefully prepared with glass or quartz photo pale containing a copy of pattern to be transferred to SiO2 Exposed photoresist parts undergo chemical changes depending on photo resist In negative photo resist exposed parts form polymer like structures and unexposed parts dissolves after developing

23 Lithography Fig: majos steps in lithography a)Apply resist b)Expose resist through mask c)After developing d)After oxide etching and resist removal

24 Thin Film deposition Three different Techniques Evaporation Sputtering Chemical Vapor deposition

25 Thin Film deposition(Evaporation)

26 Thin Film deposition(Sputtering)

27 Chemical Vapor Deposition(CVD) 1.Atmospheric Pressure CVD 2.Low Pressure CVD 3.Plasma Enhanced CVD

28 Epitaxy Epitaxy is a special type of thin layer deposition. Whereas deposition described in the previous yields either amorphous or polycrystalline layer, it yield a crystalline layer


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