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The Physical Structure (NMOS)

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Presentation on theme: "The Physical Structure (NMOS)"— Presentation transcript:

1 The Physical Structure (NMOS)
Gate oxide Polysilicon Gate Al Al SiO2 SiO2 SiO2 S D Field Oxide Field Oxide n+ channel n+ L P Substrate contact Metal (G) L (S) n+ n+ (D) W Poly

2 3D Perspective

3

4 Fabrication Process Crystal Growth Doping / Diffusion Deposition
Patterning Lithography Oxidation Ion Implementation

5 Fabrication- CMOS Process
Starting Material Preparation 1. Produce Metallurgical Grade Silicon (MGS) SiO2 (sand) + C in Arc Furnace Si- liquid 98% pure 2. Produce Electronic Grade Silicon (EGS) HCl + Si (MGS) Successive purification by distillation Chemical Vapor Deposition (CVD)

6 Fabrication: Crystal Growth
Czochralski Method Basic idea: dip seed crystal into liquid pool Slowly pull out at a rate of 0.5mm/min controlled amount of impurities added to melt Speed of rotation and pulling rate determine diameter of the ingot Ingot- 1to 2 meter long Diameter: 4”, 6”, 8”

7 Fabrication: Wafering
Finish ingot to precise diameter Mill “ flats” Cut wafers by diamond saw: Typical thickness 0.5mm Polish to give optically flat surface

8 Fabrication: Oxidation
Silicon Dioxide has several uses: - mask against implant or diffusion - device isolation - gate oxide isolation between layers SiO2 could be thermally generated or through CVD Oxidation consumes silicon Wet or dry oxidation Quartz Tube Wafers Quartz Carrier Resistance Heater O 2 or Water Vapor Pump

9 Fabrication: Diffusion
Simultaneous creation of p-n junction over the entire surface of wafer Doesn’t offer precise control Good for heavy doping, deep junctions Two steps: Pre-deposition Dopant mixed with inert gas introduced in to a furnace at 1000 oC. Atoms diffuse in a thin layer of Si surface Drive-in Wafers heated without dopant Temp: 1000 wafers Dopant Gas Resistance Heater

10 Fabrication: Ion Implantation
Precise control of dopant Good for shallow junctions and threshold adjust Dopant gas ionized and accelerated Ions strike silicon surface at high speed Depth of lodging is determined by accelerating field

11 Fabrication: Deposition
Used to form thin film of Polysilicon, Silicon dioxide, Silicon Nitride, Al. Applications: Polysilicon, interlayer oxide, LOCOS, metal. Common technique: Low Pressure Chemical Vapor Deposition (CVD). SiO2 and Polysilicon deposition at 300 to 1000 oC. Aluminum deposition at lower temperature- different technique Torr Loader Pump Reactant

12 Fabrication: Metallization
Standard material is Aluminum Low contact resistance to p-type and n-type When deposited on SiO2, Al2O3 is formed: good adhesive All wafer covered with Al Deposition techniques: Vacuum Evaporation Electron Beam Evaporation RF Sputtering Other materials used in conjunction with or replacement to Al In today’s technology are cupper and its alloys.

13 Fabrication: Etching Wet Etching
Etchants: hydrofluoric acid (HF), mixture of nitric acid and HF Good selectivity Problem: - under cut - acid waste disposal Dry Etching Physical bombardment with atoms or ions good for small geometries. Various types exists such as: Planar Plasma Etching Reactive Ion Etching Plasma Reactive species RF

14 Fabrication: Lithography
Mask making Most critical part of lithography is conversion from layout to master mask Masking plate has opaque geometrical shapes corresponding to the area on the wafer surface where certain photochemical reactions have to be prevented or taken place. Masks uses photographic emulsion or hard surface Two types: dark field or clear field Maskmaking: optical or e-beam

15 Lithography: Mask making
Optical Mask Technique 1. Prepare Reticle Use projection like system: -Precise movable stage -Aperture of precisely rectangular size and angular orientation -Computer controlled UV light source directed to photographic plate After flashing, plate is developed yielding reticle

16 Fabrication: Lithography
Step & Repeat Printing Printing

17 Lithography: Mask making
Electron Beam Technique Main problem with optical technique: light diffraction System resembles a scanning electron microscope + beam blanking and computer controlled deflection

18 Patterning/ Printing Process of transferring mask features to surface of the silicon wafer. Optical or Electron-beam Photo-resist material (negative or positive):synthetic rubber or polymer upon exposure to light becomes insoluble ( negative ) or volatile (positive) Developer: typically organic solvant- e.g. Xylen A common step in many processes is the creation and selective removal of Silicon Dioxide

19 Patterning: Pwell mask

20 Patterning/ Printing SiO2 substrate

21 Fabrication Steps Inspect, measure Post bake Etch Develop, rinse, dry
Strip resist Printer align expose mask Deposit or grow layer Pre-bake Apply PR

22 Fabrication Steps

23 3D Perspective

24 The Physical Structure (NMOS)
Gate oxide Polysilicon Gate Al Al SiO2 SiO2 SiO2 S D Field Oxide Field Oxide n+ channel n+ L P Substrate contact Metal (G) L (S) n+ n+ (D) W Poly

25 Videos for Fabrication
A very clear site showing each fabrication step 4 min wafer production 9 min video showing IC fabrication process A 10 minute presentation of Global Foundries IC manufacturing process.    3 min animation of IC fabrication    A 4 min very nice presentation with animation of 3D IC manufacturing 


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