1. Mid-Term Presentation October 5, 2007

2. Team Members Charlie Mraz EE Team Leader Analog Design PCB Layout Allen Joiner EE Microprocessor Design Power Supply Purchasing/Finance James Sakalaukus CPE PC Software System Integration Scott Wilson CPE FPGA Design Website Design

3. Overview Introduction Problem Solution Design Constraints Technical Practical Design Approach System FPGA Microprocessor PC Software Project Progress

4. Problem Test Equipment is Expensive Oscilloscopes and Function Generators are Chained to University Lab Benches Opportunity to Learn, Experiment, or Work is Limited to School or Work Hours Students, Hobbyists, and Small Businesses Cannot Afford to Purchase Their Own Equipment

5. Solution PC-Based Oscilloscope / Function Generator External Device can be Small and Inexpensive Leverages Computing Resources of any PC with a USB Port Graphical User Interface Standard Scope Probe Inputs and Function Generator Output Data can be Saved and Processed “Off-Line” by Excel, MATLAB, or other Analysis Tools

6. Constraints Technical Constraints Input and Output Sampled at 60 MSa/s 30 MHz Analog Bandwidth on Inputs/Outputs 20 Volt Peak to Peak Input with a 10x Probe 10 Volt Peak to Peak Output to a 50Ω Load

7. The Competition Bitscope BS310U [1] Stingray DS1M12 [2] DAWGi Sample Rate 40MSa/s1MSa/s60MSa/s Analog Bandwidth 100MHz250kHz30MHz Max. Input Voltage 208Vp-p10Vp-p20Vp-p Price$515.00$220.00$199.00

8. Constraints Practical Constraints Cost Manufactured for Less than $150 Sold for Around $200 Comparable products have an MSRP of up to $515 Ease of Assembly No Leadless Packages like BGA, CSP, etc. Components on Top of Board Only

9. System Design Several Possibilities Microprocessor with Built-in ADC Inexpensive Slow Trigger can be Implemented in Firmware Microprocessor, High Speed ADC, and Dual Port FIFO Most Expensive Fast Requires Separate Trigger Logic Microprocessor, High Speed ADC, and FPGA Moderate Cost Fast Trigger can be Implemented in Firmware

10. System Design μP with ADC μP, ADC, FIFO μP, ADC, FPGA CostLowHighModerate SpeedLowHigh Trigger Logic InternalExternalInternal

11. System Design

12. FPGA Design Two Main Options Altera Cyclone More Equivalent Gates Less RAM Slower More Expensive Xilinx Spartan 3E Fewer Equivalent Gates More RAM Faster Less Expensive

13. FPGA Design Altera Cyclone EP1C3 [3] Xilinx Spartan 3E XC3S100E [4] Logic Elements2,9102,160 Total RAM Bits59,90473,728 Speed Grade6ns4ns Maximum I/Os104108 Price$16.00$7.90

14. FPGA Design

15. Microprocessor Design Two Main Options Cypress CY7C63513C Less Expensive Less RAM No Hardware SPI Support Microchip PIC18LF4550 More Expensive More RAM Hardware SPI Support

16. Microprocessor Design CY7C63513C [5] PIC18LF4550 [6] Operating Voltage 4.0-5.5V2.0-5.5V RAM256 bytes2048 bytes USBLow SpeedFull Speed SPINoYes

17. Microprocessor Design PIC18LF4550

18. Software Design Two Main Options Custom Application Can Choose any Language for Implementation Start Fresh Significant Time Spent on Development Open Instrumentation Project (OIP) Tcl/Tk Work Within Predefined Framework Reduced Development Time

19. Software Design Custom Application OIP Programming Language AnyTcl/Tk Framework Flexibility HighLow Development Time HighLow

20. Software Design

21. Project Progress SeptemberOctoberNovember Analog Circuit Design Computer Software Microprocessor FPGA System Integration

22. References [1] MetaChip Pty. Ltd., “Bitscope Model 310,” Bitscope = PC Oscilloscopes and Analyzers, 2007. [Online]. Available: http://www.bitscope.com/product/BS310/. [Accessed Sept. 26, 2007].http://www.bitscope.com/product/BS310/ [2] EasySync Ltd., “DS1M12 ‘Stingray:’ USB oscilloscope and waveform generator,” USB Instruments, 2007. [Online]. Available: http://www.usb- instruments.com/documents/small_stingray.pdf. [Accessed Spet. 26, 2007].http://www.usb- instruments.com/documents/small_stingray.pdf [3] Altera, “Cyclone FPGA Family Datasheet,” Literature: Cyclone devices, 2007. [Online]. Available: http://www.altera.com/literature/hb/cyc/cyc_c5v1.pdf. [Accessed Sept. 26, 2007].http://www.altera.com/literature/hb/cyc/cyc_c5v1.pdf [4] Xilinx, “Spartan-3E FPGA Family Data Sheet,” Spartan-3E Data Sheets, 2007. [Online]. Available: http://direct.xilinx.com/bvdocs/publications/ds312.pdf. [Accessed Sept. 26, 2007].http://direct.xilinx.com/bvdocs/publications/ds312.pdf [5] Cypress Semiconductor, “Low-Speed High I/O, 1.5Mbps USB Controller,” CY7C63513C, 2007. [Online]. Available: http://download.cypress.com.edgesuite.net/design_resources/datasheets/contents/ cy7c63513c_8.pdf. [Accessed Sept. 26, 2007]. http://download.cypress.com.edgesuite.net/design_resources/datasheets/contents/ cy7c63513c_8.pdf [6] Microchip, “PIC18F2455/2550/4455/4550 Data Sheet,” PIC18F4550, 2007. [Online]. Available: http://ww1.microchip.com/downloads/en/DeviceDoc/39632D.pdf. [Accessed Sept. 26, 2007].http://ww1.microchip.com/downloads/en/DeviceDoc/39632D.pdf