Presentation is loading. Please wait.

Presentation is loading. Please wait.

Silicon Programming--Altera Tools1 “Silicon Programming“ programmable logic Altera devices and the Altera tools major tasks in the silicon programming.

Similar presentations


Presentation on theme: "Silicon Programming--Altera Tools1 “Silicon Programming“ programmable logic Altera devices and the Altera tools major tasks in the silicon programming."— Presentation transcript:

1 Silicon Programming--Altera Tools1 “Silicon Programming“ programmable logic Altera devices and the Altera tools major tasks in the silicon programming process using a “.vec” file for testing (note: references are to textbook by Hamblen et al)

2 Silicon Programming--Altera Tools2 SW Programming: Silicon Programming: "silicon compilation": basic idea: restrict possible physical configurations; sacrifice area / performance for "regularity" of design; use regular physical structures to enable AUTOMATION of layout All CAD tools will sacrifice some area/performance for automation and the ability to do "large" designs, just as software compilers sacrifice some efficiency for the ability to use a high-level language instead of assembly language; designer productivity will increase substantially, however Write Program (HLL) Compile Link to Libraries Load/ Execute Write Program (HDL/Scm) Com- pile/ Link Program Device/ Execute FitSimu- late

3 Silicon Programming--Altera Tools3

4 4 LE (Logic Element) LAB (Logic Array Block) RAM Block

5 Silicon Programming--Altera Tools5 Device families: Example: “Cyclone”—we will use EP1C6 or EP1C2 features: »logic elements (LE’s) »RAM blocks »Global clock + Phase locked loops for clock configuration »>= 170 I/O pins Cyclone LE—figure 3.7 Cyclone LABs and interconnects: figure 3.9

6 Silicon Programming--Altera Tools6 Example: using a lookup table to describe a gate network: f(A,B,C) = A'B'C + A'BC' + A'BC + ABC Inputs: ABCout 0000 0011 0101 0111 1000 1010 1100 1111

7 Silicon Programming--Altera Tools7 Other common architectures: Product Term CPLD: Altera MAX 7000S uses matrix of produce terms; can expand to neighboring “macrocells” Figures 3.5, 3.6 Configurable logic blocks (CLB): Xilinx 4000 Figure 3.12

8 Silicon Programming--Altera Tools8

9 9

10 10 power VGA port parallel port PS2 port +3.3V supply LED on/off switch user-definable pushbuttons user-definable LEDs user-definable DIP switches global reset USB port serial port invalid input voltage LED UP3 BOARD http://users.ece.gatech.edu/~hamblen/UP3/http://users.ece.gatech.edu/~hamblen/UP3/ and http://users.ece.gatech.edu/~hamblen/UP3/UP3%20Reference%20Manual.pdf FLASH SRAM Cyclone chip +5V supply LED LC Display

11 Silicon Programming--Altera Tools11 Technology: SRAM General description: http://en.wikipedia.org/wiki/Static_Random_Access_Memory General information on “programmable” devices: http://www.tutorial-reports.com/computer-science/fpga/user-programmability.php

12 Silicon Programming--Altera Tools12

13 Silicon Programming--Altera Tools13

14 Silicon Programming--Altera Tools14

15 Silicon Programming--Altera Tools15

16 Silicon Programming--Altera Tools16

17 Silicon Programming--Altera Tools17

18 Silicon Programming--Altera Tools18 using the.vec file: open the simulator; then on the "File" menu choose inputs/outputs; then choose your.vec file; you must do this BEFORE opening a.scf file Note: results of the simulation cannot be saved as a.vec file. To save your results, save them as either a waveform (.vwf) or a table output (.tbl) file.


Download ppt "Silicon Programming--Altera Tools1 “Silicon Programming“ programmable logic Altera devices and the Altera tools major tasks in the silicon programming."

Similar presentations


Ads by Google