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EMT 351 DIGITAL IC DESIGN En. Rizalafande Che Ismail (Course Co-ordinator) Pn. Siti Zarina Md Naziri School of Microelectronic Engineering School of Microelectronic.

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Presentation on theme: "EMT 351 DIGITAL IC DESIGN En. Rizalafande Che Ismail (Course Co-ordinator) Pn. Siti Zarina Md Naziri School of Microelectronic Engineering School of Microelectronic."— Presentation transcript:

1 EMT 351 DIGITAL IC DESIGN En. Rizalafande Che Ismail (Course Co-ordinator) Pn. Siti Zarina Md Naziri School of Microelectronic Engineering School of Microelectronic Engineering

2 PENGUMUMAN Pelajar yang telah pergi InDex pada 8-10 Mei yang lalu WAJIB pergi ke lawatan industri pada 12 July 2006 (Rabu). Maklumat lanjut sila rujuk di papan kenyataan kolej kediaman atau hubungi En. Muammar ext 8366.

3 OUTLINE Introduction to the subject EMT 351 Introduction to the subject EMT 351 Introduction to the VLSI system design Introduction to the VLSI system design  VLSI design methodology and CAD/EDA tools  Hardware description language (HDL)

4 INTRO Teaching Plan Teaching Plan

5 Previous Semester …

6 This Semester …

7 OUTLINE Introduction to the subject EMT 351 Introduction to the subject EMT 351 Introduction to the Digital IC design Introduction to the Digital IC design  Digital IC design methodology and CAD/EDA tools  Hardware description language (HDL)

8 Today’s VLSI : System-on-Chip (SoC) Bidirectional Devices System-on-Chip Input Devices Output Devices I/F microphone camera sensor keypad mouse joystick switch peripheral bus (IEEE1394, USB, RS232C, PCI, SCSI, AGP, ISA, ATA, …) storage (SRAM, DRAM, FLASH-ROM, disk drive) network (Modem, Ethernet, wireless) speaker LCD/CRT display LED light motor

9 SoC – A simplified (logical) view On-chip memory Interconnect network (busses, crossbar switches, wires) I/F Output Devices Bidirectional Devices Input Devices On-chip memory Register file On-chip memory Functional blocks On-chip memory Controller I/F

10 Algorithm-Level Behavioral Description Register-Transfer Level Structural Description Logic/Transistor Circuit Description VLSI Mask Layout Logic Synthesis Layout Synthesis ( High-Level Synthesis ) System Specification ( System-Level Synthesis ) Layout Verification Logic Verification Behavioral Verification System Verification Systematic Digital IC Design Flow

11 System Specification System functionality (application) Operating environment (IO interface) Cost (development, manufacture, test) Size/weight (# of chips, board area, box size) Power consumption Flexibility (specification changes, added functionality)  Human language (English, Japanese, Thai, etc.)

12 System Synthesis/Verification Algorithm Description System Specification  Software languages (C/C++, Java)  Hardware languages (Verilog, VHDL) Functional Simulation (SW/HW co-simulation) Data : types/widths, structures, arrays Process : expressions, control-flow, procedures, functions Communication : protocols Simulation : input stimulus, output verification manual translation  Human language

13 High-Level Synthesis/Verification Algorithm Description  Software languages (C/C++, Java)  Hardware languages (Verilog, VHDL) Functional Simulation RTL Structural Description  Verilog, VHDL Architecture description  Module (CPU, memory, register, functional unit, IO interface)  Bus architecture Module description (functional/structural)  Combinational/sequential circuit description manual translation (High-Level Synthesis )

14 Logic Synthesis/Verification Logic Verification Timing Verification Power analysis RTL Structural Description Logic/Transistor Circuit Description  Verilog, VHDL  Schematic  Netlist  Verilog, VHDL Logic Minimization Technology Mapping Cell components (gates, registers, transistors) Nets IO pins

15 Layout Synthesis/Verification Circuit topology verification Design rule check Timing Verification Logic / Transistor Circuit Netlist  Verilog, VHDL  Schematic  Netlist VLSI Mask Layout  Mask Pattern Cell / module layout (manual or auto) Place and Route Layers (well, diffusion, polysilicon, metals, vias) Rectangle, polygons

16 CAD/EDA Tools Electronic design automation (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits. This is sometimes referred to as ECAD (electronic computer-aided design) or just CAD. printed circuit boardsintegrated circuitscomputer-aided design printed circuit boardsintegrated circuitscomputer-aided design

17 Cont..

18 OUTLINE Introduction to the subject EMT 351 Introduction to the subject EMT 351 Introduction to the Digital IC design Introduction to the Digital IC design  Digital IC design methodology and CAD/EDA tools  Hardware description language (HDL)

19 What is HDL ?  HDL – Hardware Description Language  Used to describe the logic functionality of a circuit  Can also describe the behavioral aspects of a circuit function  Sometimes used to show the netlist of a circuit

20 Cont..  Two types of HDL  Verilog  VHDL (VHSIC HDL – Very High Speed Integrated Circuit Hardware Description Language)  Latest type of HDL language  C/C++ code – not widely accepted  Superlog – very new. Mostly still under research

21 VHDL vs Verilog   Always an argument on which is a better form of HDL.   Both has its advantages and disadvantages.

22 Cont..   Verilog :   Easy to write.   Easy to read & understand as it is similar to C.   Easier to learn compared to VHDL   All design centres in Malaysia uses Verilog.

23 Cont..   VHDL :   It is more complicated & more difficult to learn compared to Verilog.   More coding rules to follow.   More flexible compared to Verilog   Can reflect real design more efficiently.

24 Cont..   Whichever is more suitable to be used as the standard HDL depends largely on individual designer.   Most EDA/CAD design tools in the market can handle both Verilog & VHDL

25 That’s all for today. See u on Friday..


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