US stavelet update 12th April 2013. PPB2s on serial power side 12 Apr 20132 SAMTEC connector (floating) Bond pad (connected to EoS through WB + bus tape.

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Presentation transcript:

US stavelet update 12th April 2013

PPB2s on serial power side 12 Apr SAMTEC connector (floating) Bond pad (connected to EoS through WB + bus tape conductor) SAMTEC U2-U2B (irradiated FETs) D1 zenerTrace + WB

PPB2s issue  In addition to that connection (present in all modules), W-shunt was enabled (missing wire bond) in one of the hybrids of module 2, and the voltages on the 1-wire circuit were not correct the very first time the stavelet was powered  The FETs on the PPB2 of module 2 fried, and the PCB itself was damaged (probably acted as a fuse…)  Removed undesired wirebonds on all modules, so that the connection was really floating  Loaded a new PPB2 and replaced it  Everything works fine after that:  ΔV = mV across disabled modules 12 Apr ΔV = 117mV All enabledM2 disabled

ENC 1fC (after trimrange) 12 Apr Hybrid 56 Hybrid 55 Hybrid 58 Hybrid 57 Hybrid 60 Hybrid 59 Hybrid 62 Hybrid 61 M3M2M1M0 Comparable (or even better) to CoM with PI filter boards

Double trigger noise  Even hybrids always worse (also true for ENC), but results still quite good, except an ugly hybrid 58  What’s new:  Extra 10 μF caps between BCC (hybrid) GND and data shield (total = 10.1 μF)  Al shielded module: Reference between hybrids made through metal pieces in between hybrids rather than Al shield and Cu square  Pretty fresh result, I still have to look further into this 12 Apr Thr. value Module 3Module 2Module 1, Al shieldedModule 0 Hybrid fC fC fC

Sensor on module 1 (Al shield)  Strange behavior (at least for me) on sensor of module 1 of SP side (FZ1, module SC- 02, Al shielded module)  Leakage current at 200 V (and chips power ON) stays < 0.26 μA for a couple of minutes, then starts rising slowly, until it stabilizes at around 4-6 μA  After some time (~50 min) it starts going down again very slowly  Cooling is ON all the time  It doesn’t happen at all when the chips power is OFF → “thermal runaway”? (although nothing evident from thermal images)  It doesn’t happen while keeping V < 180V  Started right after having the PPB2 boards working, before then I ~ 0.25 μA at 200 V (stable) 12 Apr Current (μA) Time (s) V=200 V Measurement taken during strobedelay + 3pointgain + trimrange

New firmware versions  Checked Matt’s new firmware versions with top and bottom streams of HSIO-IB enabled:  v4192 (no streams on IDC connector) Streams 0-15 (top) → OK Streams (bottom) → OK  v4194 (no streams on IDC connector) Streams 0-15 (top) → OK Streams (bottom) → OK  v419e (no streams on IDC connector) Streams 0-15 (top) → OK Streams (bottom) → OK  Firmware is ready for double sided stavelet tests with a single HSIO! 12 Apr 20137

Next  HV power with root/sctdaq  Get rid of Labview HV controller: requires too many PC resources, slows down sctdaq significantly  Simultaneous readout of both stavelet sides  First with 2 HSIO + 2 PCs + 2 sctdaq, later with single HSIO and PC  Noise injection on pulsing lines (JP14 differential data lines on EoS, Noise-P- M streams on 50 pin SAMTEC, next to BCO lines)  An extra macro on sctdaq will do, or do I also need to modified firmware?  Also asynchronous noise injection?  Shielded vs. shieldless modules: “final” test 12 Apr 20138