SPD VFE installation and commissioning (status and plans) I.Summary of VFE installation II.Stand alone VFE test: noise & offset III.Stand alone test: LED.

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Presentation transcript:

SPD VFE installation and commissioning (status and plans) I.Summary of VFE installation II.Stand alone VFE test: noise & offset III.Stand alone test: LED signal IV.Plans for the VFE installation and commissioning V.Questions PS/SPD Installation meeting – CERN – 12th June 2007

I. Summary of VFE installation All the VFE and regulator cards have been installed (C and A side) All the cards have been tested: –Digital (R FPGA status register, W/R ASIC register, W/R on board DACs and test synchronous signals) –Offset and noise –LED signal Two VFE cards have shown some problems with synchronous reset. Cards will be exchanged and studied at Barcelona. VFE cards show a few communication errors (usual is 0 for Kcycles) when connected to a specific regulator card. The regulator card will be replaced No other relevant problem detected till now.

II. Stand alone test: noise and offset Mean noise of about 2,3 mV rms for all the cards both without and with HV, except for a few noisy channels in some for some cards (observed for C side). After investigating the problem in Barcelona it has been discovered that if the connection of the ground of the VFE card to radiator (box ground) is improved the noisy channels disappear. Improvement consist on adding a washer and nut to improve connection of ground screw to the radiator. All the VFE on A side incorporate this and no excess noise is observed. It will be done for VFEs on C side when boxes will be cabled. Noise for each of the 64 channels of a VFE card HV = 0 V HV = -700 V

III. Stand alone test: LED signal The cards have tested with detector LED system with the help of Evgueni. In general we saw LED signal except for some cases: –We did not see any LED signal at all for two cards: position 2 and 8 of box 5B. Both cards are connected to the same splitter. –There were groups of 16 dead channels in other two cards: position 2 in box 2T and position 5 in box 4B. –Some LED channels of a given card (position 1 in box 5T) are not firing at the same time –Comments on dead channels and LED uniformity later… LED signal for each of the 64 channels (128 subchannels) of a VFE card (8 clock periodes are shown)

III. Stand alone test: LED signal LED system nicely allows fine phase tuning Delay “scan” between LED trigger and 40 MHz clock controlling VFE integration using a delay unit. Optimal delay

III. Stand alone test: LED signal We studied the uniformity as function of VLED, with high frequency trigger for a given card. We changed VLED adjusting the PMT HV to work at the limit of the saturation of VFE electronics The effect of increasing high level of trigger pulse it is not determinant also, uniformity factor is still about 10 with VLED=-3,3 V. Uniformity of LED system seems to be clearly related to VLED, i.e. it is uniform for VLED>-3V reaching a plateau of value 2,8, which is indeed close to the uniformity of this PMT (2,7). To operate at the plateau without saturate any channel the maximum (in modulus) HV would be V, whereas we expect to operate VFE electronics between -650 and – 700 V (to have 100 fC/MIP at the PMT channel of highest gain). Photoelectron (mean of chs and max ch) number is also computed, using statistical relationship:

III. Stand alone test: LED signal All the VFE cards of the C side have been tested with LED system at a HV of -650 V and the uniformity was good enough to look for dead channels (see “SummaryTestCside_SPD_April07.xls”). Uniformity results are better for outer and middle modules than for inner ones. A comparison between pictures of fibres and our data seems good agreement except for 5 channels (an the groups previously reported). The uniformity for the A side was worst: even decreasing HV to -600 V the non-uniformities were so high that we have not been able to detect dead channels (low signals are below the level of optical crosstalk…) Nevertheless, the tests have been fruitful to check that cards with PM are roughly working. Either the LED signal uniformity of A side is poorer than for C side or there is a systematic problem with the stand alone interface to the LED system (it was the same system …) Some test with stand alone system could be repeated when cabling in boxes will be done. Final answer when final LED system will be operative

III. Stand alone test: LED signal Three different settings of the voltage controlling the tail cancellation (vsub) have been tried. LED signal is clipped for vsub=-180 mV

IV. Plans for the VFE installation and commissioning Methodology: 1.Installation: cable in VFE boxes and in crates 2.Test cables: with final and autonomous set-up (only a small board “hanging on the cables”): digital noise and offset. Can (should) be done at the same time of installation is done. 3.Test with PS/SPD FE card + CB + everything… Week of 11th June: –Installation of C side LV patch panel and cabling to power supply –Cabling in VFE boxes of accessible SMs (1 and 2) of C side –If possible cable corresponding crates (with previous tests of cables) As soon as RICH platform is dismounted continue with other SMs of C side and A side. End June??? Beginning July??? A LOT OF WORK DURING JULY!!! As soon as crate system (hardware and software) is operational (beginning July????): –Test link between CB and VFE. –Test link between PS/SPD FE card and SPD VFE. It can be done with LVDS pattern (synchronous with CB included or asynchronous without CB). –Threshold scans using final system.

V. Questions The platform over RICH2 should be dismantled as soon as possible to get access to SMs 3,4,5 and 6. The RICH scaffoldings are needed to access top part (for a long time): –They are currently fixed to RICH2 platform… –What will happen with these scaffoldings when the installation on M1 will start? (next week)? –Regarding cables “hanging” on detector cable tray, is there any problem with start of installation of M1? Main part of the installation effort of SPD will be concentrated in July (points 1 and 2 in previous slide). Would it be useful to coordinate efforts with INR to tune LED system in phase 2 or 3? Problems with Maraton power supply on C side? How to use motor system to move the detector? Is it possible to use area on top of the crate to bend softly LV cables?