Robust Low Power VLSI R obust L ow P ower VLSI Deliberate Practice Variation-Resilient Building Blocks for Ultra-Low-Energy Sub-Threshold Design Alicia,

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Robust Low Power VLSI R obust L ow P ower VLSI Deliberate Practice Variation-Resilient Building Blocks for Ultra-Low-Energy Sub-Threshold Design Alicia, Kyle, Yanqing Dept. of Electrical Engineering, University of Virginia April 03, 2013

Robust Low Power VLSI Motivation 2  Energy minimization for BSNs  Operate circuits in sub-threshold  Tradeoffs  Sensitivity to variation  Performance

Robust Low Power VLSI What is Variation?  Devices performing differently from how they were designed to operate  Effects  Robustness  Performance  Causes  Process  Voltage  Temperature 3

Robust Low Power VLSI Variation in Sub-Threshold 4  Types of Variation  Random Dopant Fluctuation  Carrier Mobility  W/L  Lithography  Threshold Voltage  Oxide Thickness  Analysis Tools  Monte Carlo  Corner Analysis [1]

Robust Low Power VLSI Metrics for Evaluation 5

Robust Low Power VLSI Attacking the Problem 6 Block/Logic Level ??? Standard Cells ??? Device Level ???

Robust Low Power VLSI Research Questions 7 1.How do you design sub-threshold standard cells capable of MHz operation that are variation-resilient?

Robust Low Power VLSI Research Questions 8

Robust Low Power VLSI Research Questions 9 1.After considering the inverter, what other techniques can we apply to other standard cells? 1.Combinational 2.Sequential

Robust Low Power VLSI References 10 1.Process Variations, University of Maryland, Advanced VLSI Design: lect10_process_var.pdf 2.Reynders, N.; Dehaene, W., "Variation-Resilient Building Blocks for Ultra-Low-Energy Sub-Threshold Design," Circuits and Systems II: Express Briefs, IEEE Transactions on, vol.59, no.12, pp.898,902, Dec