Outline Introduction CMOS devices CMOS technology CMOS logic structures CMOS sequential circuits CMOS regular structures.

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Presentation transcript:

Outline Introduction CMOS devices CMOS technology CMOS logic structures CMOS sequential circuits CMOS regular structures

CMOS logic structures CMOS logic: “0” and “1” The MOST - a simple switch The CMOS inverter The CMOS pass gate Simple CMOS gates Complex CMOS gates

CMOS logic: “0” and “1” Logic circuits process Boolean variables Logic values are associated with voltage levels: –V IN > V IH  “0” –V IN < V IL  “0” Noise margin: –NM H =V OH -V IH –NM L =V IL -V OL

The MOST - a simple switch

MOSFET’s in digital design Important characteristics: –It is an unipolar device NMOS - charge carrier: electrons PMOS - charge carrier: holes –It is a symmetrical device Source = drain –High input impedance (Ig=0) Low standby current in CMOS configuration –Voltage controlled device with high fan-out

The CMOS inverter

The CMOS pass gate

Regions of operation: “0” to “1” transition NMOS: –source follower –V gs = V ds always: V out < V dd -V TN  saturation V out > V dd -V TN  cutoff –V TN > V TN0 (bulk effect) PMOS: –current source –V out < |V TP |  saturation –V out > V TP  linear

Simple CMOS gates

Complex CMOS gates

Can a compound gate be arbitrarily complex? –NO, propagation delay is a strong function of fan- in: –FO  Fan-out, number of loads connected to the gate: 2 gate capacitances per FO + interconnect –FI  Fan-in, Number of inputs in the gate: Quadratic dependency on FI due to: –Resistance increase –Capacitance increase –Avoid large FI gates (Typically FI  4)

Single-Bit Addition Half Adder Full Adder ABC out S AkAk BkBk C k-1 CkCk SkSk For the Sum S k If A k =B k then Sk=C k-1 else S k =C k-1 For the carry If A k =B k then C k =A k =B k else C k =C k-1

17: Adders 28 Full Adder Design I Brute force implementation from eqns

17: Adders 29 Full Adder Design II Factor S in terms of C out S = ABC + (A + B + C)(~C out ) Critical path is usually C to C out in ripple adder

Complex CMOS gates