1 5. Application Examples 5.1. Programmable compensation for analog circuits (Optimal tuning) 5.2. Programmable delays in high-speed digital circuits (Clock.

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Presentation transcript:

1 5. Application Examples 5.1. Programmable compensation for analog circuits (Optimal tuning) 5.2. Programmable delays in high-speed digital circuits (Clock skew compensation) 5.3. Automated discovery – Invention by Genetic Programming (Creative Design) 5.4. EDA Tools, analog circuit design 5.5. Adaptation to extreme temperature electronics (Survivability by EHW) 5.6. Fault-tolerance and fault-recovery 5.7. Evolvable antennas (In-field adaptation to changing environment) 5.8. Adaptive filters (Function change as result of mission change) 5.9 Evolution of controllers

2 Hardware Evolution of Analog Speed Controllers for a DC Motor Development of an autonomous, self-configurable controller for use on a remotely located platform –Adaptation of controller to environmental changes that would otherwise degrade performance Temperature extremes Ionizing radiation Variation in the controlled dynamic system –Reconfiguration of controller structure Use of degraded components: electronic and mechanical Exclusion of failed components: sensor failures – Response to changing mission requirements Applicable to platforms for exploration of space or extreme terrestrial environments Work by Gwaltney (MSFC) and Ferguson (JPL)

3 Motivation for This Work Motor driven systems are ubiquitous in commercial, industrial, military and aerospace applications By-wire technology relies extensively on electromechanical actuators –Aircraft, fly-by-wire –Automobiles, drive-by-wire –Recent space transportation vehicle concepts Availability of programmable analog or mixed-signal devices makes the implementation of analog control loops attractive at the actuator and subsystem level –Can be as easily modified as software

4 Approach Use of JPL developed Stand Alone Board Level Evolvable (SABLE) System as platform for controller evolution Employs the JPL second generation Field Programmable Transistor Array (FPTA2) GA implemented in firmware and executed on a Digital Signal Processor (DSP) single board computer (SBC) FPTA2 configuration through digital interface on SBC 16 bit DAC provides stimulus of the FPTA2 16-bit, multi-channel ADC module captures FPTA2 output and other analog signals for fitness evaluation

5 SABLES

6 JPL FPTA2 Cell Layout I(96) O(64) analog inputs 64 analog outputs Interconnection between cells N S WE New technology: TSMC 0.18 – 1.8v; 64 reconfigurable cells;

7 JPL FPTA2 Cell Schematic

8 Evolvable Controller Configuration FPTA2 CMD DSP w/Analog Module Error = CMD - Feedback Motor Driver DC Motor Tachometer Current Control Diagram of the experimental configuration for hardware evolution of analog motor speed controllers

9 Evolvable Controller Configuration Second motor operated as a generator and used to provide load

10 Baseline Analog Controller Design Most widely used form of analog controller is the Proportional-Integral (PI) Controller Used for motor current control and speed control PI control law is represented by Where e(t) is error between desired plant response and measured plant response, K P is proportional gain, K I is integral gain or time constant, K D is derivative gain

11 Baseline Analog PI Controller Vu = (Ve - Vbias2)(R2/R1 + 1/R1Cs) + Ve Ve = Vcmd/ – Vtach/2 R1 = 10K, R2 =200K, C=0.47uF, Vbias2 = Vcmd and Vtach, Ve and Vu are 0 – 1.8V signals PI Controller for 1.8V supply and 1.8V unipolar signal range 20K + _ + _ + _ + _ 1.1K 10K, 1% 20K Pot R1 R2C Vu Ve Vbias1 (0.9V) Vbias2 (0 – 1.8V) Vtach Vcmd 1.8V

12 Response Using PI Controller Motor speed response obtained using PI controller. Vsp is gray, Vtach is black Response with no offset between command and tachometer feedback is achieved by adjusting Vbias2

13 Evolution of Analog Controllers Two FPTA cells used –Cell 1 provided with motor speed command and tachometer feedback. Responsible for producing current command to motor driver. –Cell 0 used to provide support electronics for cell 1 Evolutionary Algorithm –Standard GA –Population initially seeded with randomly generated FPTA2 configurations –Population constrained to force the cell 1 switches closed that connect the speed command and tachometer feedback to the cell –All closed-loop controllers must use a command and feedback to produce an error signal DAC module generates sinusoid for motor speed command ADC module simultaneously records command and feedback signals for fitness evaluation

14 Evolution of Analog Controllers Many Controllers were evolved using varying fitness functions and conditions Experimental results for two evolved controllers will be presented. The fitness functions and conditions for the evolution of the two cases given differ as shown below Case 1 Case 2 Penalty for not connecting speed command or feedback signal to cell individuals in the population 2 Hz sinusoid for speed command Forced closure of switches connecting speed command and feedback signal to cell individuals in the population 3 Hz sinusoid for speed command

15 Experimental Results Motor speed response obtained using evolved controllers. Vsp is gray, Vtach is black Case 1 Evolved Controller Case 2 Evolved Controller

16 Experimental Results The Case 1 response is compared to the baseline response obtained using the PI controller in the tables below The increase in mean error indicates higher constant offset error in the response. In PI controller this offset is removed via adjustment of Vbias2. FPTA is given no such bias input. Experiments show the cell 0 is providing a biasing action for cell 1

17 Experimental Results Case 2 is interesting in that the switches (S54, S61, S62, S63) that route the tachometer feedback to the interior of the reconfigurable cell are all open. Removal of the feedback signal causes the controller to malfunction This implies an unanticipated pathway exists in the cell that is being exploited by the evolution This is the only example obtained to date that uses this exploit.

18 JPL FPTA2 Cell Schematic In Case 2, Switches 54, 61, 62 and 63 are open in Cell 1 Tach Feedback Speed Command

19 Experimental Results The evolved controllers are providing a good response using two adjacent cells in the FPTA to perform a similar function to four op-amps, a collection of 12 resistors and one capacitor. –The FPTA switches have inherent resistance on the order of KOhms –Each cell has 14 transistors to be used as functional components –Cells can be used to implement op-amps by using external passive components and bias voltages –No external components or bias provided The capability of the controller to respond to inputs of varying amplitude and frequency and varying load are presented on subsequent slides

20 Response to Speed Command Changes Case 1 Evolved Controller Channel 1 is command, Ch2 is feedback, Ch3 is controller output, Ch4 is motor current and ChM is the error between Ch1 and Ch2

21 Response to Load Changes No Load Full Load Case 1 Evolved Controller Note the changes in controller output (ch3) and current (Ch4). In the No load case, the positive current oscillates, but is steady in the full load case. Oscillation is sort of a PWM action. So steady current indicates higher torque in response to higher load. Negative current magnitude increases in Full Load Plot

22 Response to Load Changes No Load Full Load Case 1 Evolved Controller Note the changes in controller output (ch3) and current (Ch4). In the No load case, the positive current oscillates, but is steady in the full load case. Oscillation is sort of a PWM action. So steady current indicates higher torque in response to higher load. Negative current magnitude increases in Full Load Plot

23 Summary The results presented show the FPTA2 can be used to evolve simple analog closed-loop controllers that provide good response in comparison with a PI controller Evolved design uses less transistors than the conventional design, and no external components. –Neglecting programmable overhead, considering functional components only Relatively slow response of many practical servomotor-driven systems is a time bottleneck that increases time to convergence –Can be addressed through novel controller configurations and approach to evolution