Module : TASKS, Functions and UDPs in Verilog. Functions Functions are declared with the keywords function and endfunction. Functions are used if all.

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Presentation transcript:

Module : TASKS, Functions and UDPs in Verilog

Functions Functions are declared with the keywords function and endfunction. Functions are used if all of the following conditions are true for the procedure. There are no delay, timing, or event control constructs in the procedure. The procedure returns a single value. There is at least one input argument.

Function features When a function is declared, a register with name is declared implicitly inside Verilog. The output of a function is passed back by setting the value of the register appropriately. Notice that at least one input argument must be defined for a function. Functions cannot invoke other tasks. They can only invoke other functions.

Typical Structure of a Function

Example 1 The first example models a parity calculator that returns a 1-bit value. Let us discuss a function that calculates the parity of a 32-bit address and returns the value. We assume even parity. Example 1 shows the definition and invocation of the function calc-parity. The verilog code is shown in the next page.

Example 1 : Parity calculations module parity; reg [31:0] addr; reg parity; begin parity = calc_parity(addr); end function calc_parity input [31:0] address; begin calc_parity = ^address; end endfunction endmodule //Return the xor of all address bits. //invocation of calc_parity function

Example 2 : left-right shifter To illustrate how a range for the output value of a function can be specified, let us consider a function that shifts a 32-bit value to the left or right by one bit, based on a control signal. Example 2 shows the implementation of the left/right shifter. The verilog code has been shown in next page.

Example 2 : Left-Right Shifter module shifter: 'define LEFT-SHIFT l'bO 'define RIGHT-SHIFT l'bl reg [31:0] addr, left-addr, right-addr; reg control; (addr ) begin //call the function defined below to do left and right shift. left-addr = shift(addr, 'LEFT-SHIFT); right-addr = shift(addr, 'RIGHT-SHIFT); end function [31: 0] shift; //define shift function. The output is a 32-bit value. input [31:0] address; input control; begin shift = (control == 'LEFT-SHIFT) ?(address > 1); end endfunction endmodule //Compute the right- and left-shifted values whenever //a new address value appears