FPGA-Based Arcade Emulation Danny Funk, Cory Mohling, Tony Milosch, David Gartner, John Alexander Advisor: Philip Jones Client: Joseph Zambreno

Project Objective Goal o Showcase the capabilities of reconfigurable computing platforms Problem o Continue 09/10 Senior Design team’s NES Emulation through FPGA o Create Arcade Machine that can be put on display

Conceptual Sketch Boot Loader Controls (I/O)

Functional Requirements FPGA FR 1.1 – All NES specific emulation must be performed entirely in hardware. FR 1.2 – Emulation must be contained within the FPGA Xilinx570X board.

Functional Requirements Emulator FR 2.1 – Emulator must support the instruction set used by the original NES system. FR 2.2 – Emulator must be able to run a NES ROM file from an outside source.

Functional Requirements I/O - Controls FR – Emulator must accept input from arcade style controls. FR – Emulator must accept input from NES controllers. FR – Emulator must respond to controller input with the same latency as the original NES. FR – Emulator must accept controls for up to two players.

Functional Requirements I/O – Video FR – System must be able to display images to a connected display. FR – System must output video to a screen at the original NES frame rate. FR – Emulator must use a color palette consistent with the original NES color palette. FR – Must be compatible with VGA Output.

Functional Requirements I/O – Audio FR – Emulator must generate background music for NES games. FR – Emulator must generate sound effects with the same latency as the original NES.

Functional Requirements Boot Loader FR 4.1 – Must be able to display a selectable list of games to the connected display. FR 4.2 – Must be able to load the selected ROM file to the emulator without modifying the FPGA.

Functional Requirements Cabinet FR 5.1 – Cabinet must be able to support a 103 lb. monitor. FR 5.2 – Cabinet must accept a standard 120 VAC source to power the system.

Non-Functional Requirements NFR 1.1 – Emulator must be contained within a removable control box. NFR 1.2 – All components of the emulator should be implemented as independent modules. NFR 1.3 – The Cabinet should be sturdy enough to resist collapse under normal usage. NFR 1.4 – The Cabinet should be able to fit through a 3’0” wide doorway. NFR 1.5 – Users should be able to easily understand how to play a game without off-screen instructions.

Considerations Constraints o System has to be designed around NES ROM files and NES instruction set o Only a limited amount of logic on FPGA board o Cabinet should be able to be moved from building to building on campus Technology o Using new monitor technology with old NES o Interfacing with arcade controls

Market Survey Another project currently exists (Veri NES). The source is not available. Various software emulators are available and will help with understanding the NES. Researched how similar arcade cabinets have been built. Took measurements of button layouts from original arcade cabinets.

Risks and Mitigations Unfamiliarity with FPGA coding and NES Architecture o Research with assistance of advisor Audio may require CPU to be rewritten o Start early on Audio Unforeseen extra design required o Start Early on FPGA work Little experience with woodworking o Seek outside advice and make detailed blueprints

Cost Estimate ItemPrice per unitquantitytotal price CABINETCabinet total castor wheels$5.104$20.4$727.4 speakers$182$36 4'x8' plywood$263$78Controls total screws/fasteners$30 $187 paint/primer$30 arcade monitor$5001 coin slots$331 CONTROLS Controls Total joystick$212$42 $187 button$310$30 Trackball$1151 ELECTRONICSElectronics total FPGA$1701 $185 misc cables$15 Materials total $ Labor$201500$30000 Grand Total: $

System Decomposition Breakdown o FPGA CPU PPU Video output Controller Input Boot loader Audio o Cabinet Physical Controls o Joystick o Buttons Monitor

System Design Controls o Develop an arcade style interface for the NES emulator o Create wire riggings for all the joysticks and buttons o Each button is mapped directly to the controller status register

System Design Boot loader o Develop Boot loader using Microblaze Processor provided in Xilinx tools o Present user with easy to use game selection screen o Read NES Rom files from Compact Flash o Parse NES Rom file and load contents into appropriate system memory for the FPGA o Reset back to Boot loader screen when reset is pressed

System Design

Cabinet o Use Solid Works to design detailed cabinet drawings o Purchase custom marquees o Build out of ¾” plywood o Detachable Control Box o Coin Door o Hidden screw and nail holes

System Design Audio o Write audio module that generates audio o Connect audio module to CPU o Map all audio related instructions from the CPU to the module o Connect audio module to AC97 to produce sound output o “A Implementation of the NES Audio Processing Unit” by Cedomir Segulja and Bill Dai

System Design PPU o Map CPU memory to PPU registers to allow for game scrolling o Implement Memory mappers to allow for more games to be played o PPU is implemented using a 14 stage finite state machine to render each pixel o Each pixel is stored in a buffer that is then sent to the VGA output

Test Plan Test as we go o After each step, make sure that the game plays as expected Simulate o Simulate incremental builds with ModelSim to ensure system works as expected Final Test o Ensure all functional requirements are met, and debug as necessary.

Current Status Side Scrolling – 80% Control Input – 95% Boot Loader – 40% Cabinet Design – 100% Cabinet Construction – 0% Audio – 0%

Next Semester Plan Start Construction of the Cabinet Start implementing Audio Complete implementation of boot Loader Continue working on debugging current implementation so more games can run.

Task Responsibility NameTasks(s)Total Hours John AlexanderBoot loader68.5 Danny FunkCabinet Design70 David GartnerController Input / Boot loader63 Tony MiloschScrolling, Debug current implementation104.5 Cory MohlingScrolling, Debug current implementation105.5

Questions