60-GHz PA and LNA in 90-nm RF-CMOS (RMO2C – 2) 60-GHz PA and LNA in 90-nm RF-CMOS Terry Yao1, Michael Gordon1, Kenneth Yau1, M.T. Yang2 and Sorin P. Voinigescu1 1University of Toronto 2TSMC

60-GHz PA and LNA in 90-nm RF-CMOS Outline Motivation mm-Wave Actives and Passives 60-GHz LNA in 90-nm CMOS 60-GHz PA in 90-nm CMOS Conclusions Acknowledgments 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS Motivation 60-GHz band: high atmospheric attenuation 7-GHz of unlicensed spectrum 57-64GHz Applications: high data-rate wireless transmission mm-wave sensors Smaller on-chip passives  higher integration  single-chip transceivers Technology scaling enables low-cost 60-GHz radio SoCs in silicon 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz System Overview Classical radio architectures: simple, robust at mm-waves Crucial front-end blocks: VCO, LNA, PA 60-GHz PA and LNA in 90-nm RF-CMOS

mm-Wave Transistor Performance Measured gain of 90-nm n-MOSFETs (~8dB) is comparable to that of SiGe HBTs (~10dB) Cascode exhibits higher gain than CS/CE stages; benefits of MOS cascode diminish at >60GHz 60-GHz PA and LNA in 90-nm RF-CMOS

Key Biasing Ideas for LNAs and PAs Peak fT, fMAX and NFMIN characteristic current densities largely unchanged across technology nodes and foundries NFMIN (0.15mA/µm) and peak fMAX (0.2mA/µm) are close  LNAs simultaneously optimized for noise and high gain In CMOS PAs optimum current swing when biased at 0.3mA/µm Optimum Current Swing Bias 10% degradation in fMAX 60-GHz PA and LNA in 90-nm RF-CMOS

Key Enabler: Lumped mm-Wave Inductors and Transformers Reduced form factor of on-chip passives at mm-waves Spiral inductors preferred over CPW or µ-strip T-lines Vertically stacked, Xfmr measured up to 94GHz Inductors and Xfmrs modeled using ASITIC® >90% accuracy Measured transformer power transfer up to 94GHz 1:1 vertically stacked transformer in 90-nm CMOS 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS Outline Motivation State-of-the-Art mm-Wave Actives and Passives 60-GHz LNA in 90-nm CMOS 60-GHz PA in 90-nm CMOS Conclusions Acknowledgements 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS mm-Wave LNA Design Cascode offers best isolation, low-to-moderate noise, ease of matching, good linearity, high gain; drawback is higher supply voltage Methodology based on: Voinigescu et al., JSSC (Sept. ’97) 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz LNA in 90nm CMOS 2-stage cascode biased at 0.2mA/µm (gain, linearity and noise) Input/output matched to 50Ω (accounting for CPAD) No source degeneration in 2nd stage for gain LM1 forms artificial t-line with (Cgs2+Csb2) and (Cdb1+Cgd1) 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz LNA Fabrication 90-nm RF-CMOS with 9-metal layers: fT/fMAX=140/170GHz (Wf=2µm) fT/fMAX=120/200GHz (Wf=1µm) Thick top metals M8 & M9 Inductors: high Q, small area 2pF MIM capacitors for de- coupling Large metal plane and ample substrate contacts 350 x 400 µm2 400µm 350µm Active area: ~180 x 300 µm2 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz LNA Measurements Repeatability across dies Peak gain = 14.6dB (58GHz) Isolation > 32dB IIP3 = -6.8dBm (58GHz) NF = 4.5dB (simulated) (confirmed by cascode meas. to 26GHz) 60-GHz PA and LNA in 90-nm RF-CMOS

LNA Comparison with State-of-the-Art [ITRS] LNA Technology f G NF IIP3 DC Power Area FOM 160/160 GHz fT/fMAX SiGe HBT [1] 65GHz 14dB 10.5dB (sim) -6dBm 34mW @ 2.5V 0.3 x 0.4 mm2 1.2 200/290 GHz fT/fMAX SiGe HBT [2] 61.5GHz 15dB 4.5dB (meas) -8.5dBm 10.8mW @ 1.8V 0.6 x 0.9 mm2 13.8 90/130 GHz fT/fMAX 130nm CMOS [3] 60GHz 12dB 8.8dB (meas) -0.5dBm 54mW @ 1.5V 1.3 x 1.0 mm2 2.1 140/170 GHz fT/fMAX 90nm CMOS [4] 58GHz 14.6dB 4.5dB (sim) -6.8dBm 24mW @ 1.5V 0.35 x 0.4 mm2 8.1 [1] M. Gordon et al., SiRF ’06. [2] B. Floyd et al., ISSCC ’04. [3] C. Doan et al., ISSCC ’04. [4] This work. First 60-GHz LNA in 90-nm CMOS Higher gain, lower NF, lower power dissipation, smaller area than 130nm 60G LNA Design scalable in frequency and ported to STM’s 90nm CMOS technology (60GHz receiver submitted to CSICS 2006) 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS Outline Motivation State-of-the-Art mm-Wave Actives and Passives 60-GHz LNA in 90-nm CMOS 60-GHz PA in 90-nm CMOS Conclusions Acknowledgements 60-GHz PA and LNA in 90-nm RF-CMOS

Key mm-Wave PA Design Ideas Class A for maximum linearity Linear voltage swing decreases with each new node Current swing constant across nodes Measured breakdown >3V [ITRS] 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz PA in 90nm CMOS Class A, 3-stage CS topology Input/output match  50 Branch currents scaled for optimal linearity Input Match Interstage Match and Degeneration 1-Stage L-Match at Output RF IN Q 1 L S1 = 96 pH G1 = 65 pH D1 = 105 pH V DD = 1.5 V : 32 x 1 µ m 2 : 36 x 1 S2 = 60 pH G2 D2 3 S3 G3 D3 G OUT 5 k C C1 = 33 fF C2 C3 = 80 fF : 40 x 1 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz PA Fabrication 430µm 350µm Active area: ~350µm x 160µm Same 90-nm RF-CMOS process technology as 60-GHz LNA Spiral inductors for matching  high area efficiency 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz PA Measurements Repeatability across dies Peak gain = 5.2dB (60GHz) 3-dB BW > 13GHz (52-65GHz) S22, S11 both matched (60-65GHz) OP1dB = 6.4dBm, Psat = 9.3dBm (60GHz) Maximum linearity and gain occur at 0.28mA/µm 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz PA Measurements Output compression proportional to supply voltage Maximum efficiency = 21.4%; maximum PAE = 7.4% 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA Performance Comparison [ITRS] PA Technology f G Psat P1dB, out PAE Area Topology FoM 200/290 GHz fT/fMAX SiGe HBT [1] 60GHz 10.8dB 16dBm 11.2dBm 4.3% 2.1x0.8mm2 2-stage CE (D) 74.3 200/290 GHz fT/fMAX SiGe HBT [2] 77GHz 17dB 17.5dBm 14.5dBm 12.8% 1.35x0.45mm2 4-stage CE (S) 2125 200/290 GHz fT/fMAX SiGe HBT [3] 6.1dB 12.5dBm 11.6dBm 3.5% 2.1x0.75mm2 9.1 65 GHz fMAX 0.18µm CMOS [4] 24GHz 7dB - 14.5% 0.7x1.8mm2 2-stage cascode (S) 11.7 84 GHz fMAX 0.18µm CMOS [5a] 27GHz 14dBm 8.2% 1.2x1.7mm2 3-stage cascode (S) 74.7 84 GHz fMAX 0.18µm CMOS [5b] 40GHz 10.4dBm 2.9% 2.6 170 GHz fMAX 90nm CMOS [6] 5.2dB 9.3dBm 6.4dBm 7.4% 0.35x0.43mm2 3-stage CS (S) 7.5 *FoM calculated using Psat and max. PAE. (D) – Differential, (S) – Single-Ended Highest frequency PA in CMOS Lowest area consumption Comparable to [3, 5b] in gain and Psat [1] B. Floyd et al., ISSCC ’04. [2] A. Komijani et al., CICC ’05. [3] U. Pfeiffer et al., RFIC ’04. [4] A. Komijani et al., CICC ’04. [5] H. Shigematsu et al., MTT ’05. [6] This work. 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS Conclusions First 60-GHz LNA and PA in 90nm RF-CMOS Scaling from 130nm to 90nm  better performance: Lower noise (comparable to best SiGe HBT LNAs) Lower power dissipation Higher gain (in LNAs) Reasonable output power and gain for PA Inductors and Xfmrs  compact layout (low cost) 6-GHz topologies and design methodologies can be extended to mm-waves and ported between CMOS foundries without redesign 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS Acknowledgments Gennum Corporation, NSERC and Micronet for funding OIF and CFI for equipment grants TSMC for chip fabrication CMC for CAD tools 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS Thank You. Questions… 60-GHz PA and LNA in 90-nm RF-CMOS

60-GHz PA and LNA in 90-nm RF-CMOS 60-GHz LNA Measurements LNA OP1dB at 58GHz = -0.5dB 60-GHz PA and LNA in 90-nm RF-CMOS

State-of-the-Art mm-wave LNAs and PAs in Silicon Block/ System Frequency (GHz) Technology Reference LNA 52, 65 SiGe (fT/fMAX=150/160GHz) M. Gordon et al. (ESSCIRC 2004, SiRF 2006) 61.5 SiGe (fT/fMAX=200/290GHz) B. Floyd et al. (ISSCC, 2004) 60 0.13µm CMOS C. Doan et al. (ISSCC, 2004) 77 SiGe (fT/fMAX=220/250GHz) B. Dehlink et al. (CSICS, 2005) PA A. Komijani et al. (CICC, 2005) U. Pfeiffer et al. (RFIC, 2004) 24 0.18µm CMOS A. Komijani et al. (CICC, 2004) 27 H. Shigematsu et al. (MTT, 2005) 40 Potential of mainstream CMOS for mm-wave LNAs shown in C. Doan et al. (ISSCC, 2004) Benefits of scaling on mm-wave LNA performance? SiGe has a clear advantage over CMOS in PA implementations due to higher breakdown voltage  larger output power No CMOS PAs > 40GHz 60-GHz PA and LNA in 90-nm RF-CMOS